Commit Graph

281 Commits

Author SHA1 Message Date
Yann E. MORIN
f52692ed64 arch/arm: add option to enable an optional VFP unit
Currently, the VFP selection for ARM is a little bit muddy:
  - some CPUs definitely do not have a VFP or NEON,
  - some CPUs definitely do have a VFP or NEON,
  - some CPUs may have a VFP or NEON.

However, we currently conflate the availability of the VFP/NEON with the
possibility to use them. Even is the user chooses a floating point
strategy with a 'lower' solution (i.e. VFPv2 when a VFPv3 exists, or not
using NEON when the CPU has it), some packages are still using the
CPU-defined HW availaibility rather thean the usr's selection.

Furthermore, for CPU that may have a VFP/NEON, there is no way for the
user to actually specify that the HW is indeed available; the user can
only specify the floating point strategy. This means that some packages
or some package versions, like nodejs for example, can not be properly
selected on some CPU cores, like Cortex-A9 which only may have a VFP.

Like we have an option to enable an optional NEON unit, add a similar
option to enable an optional VFP unit.

Signed-off-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2015-12-27 12:17:23 +01:00
Yann E. MORIN
b64bcbf5f2 arch/arm: reorder NEON option
Stating whether to use the NEON extensions when it is optional in the
CPU really is completing the definition of the CPU we've just selected.

Move the ENABLE_NEON option just after the choice of the CPU variant,
and before any "software" option (ABI/VFP).

This will make sense in a moment, when we introduce a similar option for
enabling an optional VFP unit.

Signed-off-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2015-12-27 12:16:45 +01:00
Arnout Vandecappelle
b3f7f949f0 arch: add tune options for powerpc e5500 and e6500
These were forgotten when the subarches were added in cd88e49.

Signed-off-by: Arnout Vandecappelle (Essensium/Mind) <arnout@mind.be>
Cc: Alvaro Gamez <alvaro.gamez@hazent.com>
Cc: Gustavo Zacarias <gustavo@zacarias.com.ar>
Tested-by: Alvaro G. M <alvaro.gamez@hazent.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2015-11-17 00:16:39 +01:00
Yann E. MORIN
e4b1fa69cd arch/arm: VFP and Thumb1 are not compatible
gcc will refuse to build with both --with-mode=thumb and --with-fpu=vfp,
with error messages during ./configure, like:

    checking for suffix of object files... configure: error: in `/home/ymor
    in/dev/buildroot/O/build/host-gcc-initial-4.9.3/build/arm-buildroot-lin
    ux-uclibcgnueabihf/libgcc':
    configure: error: cannot compute suffix of object files: cannot compile
    See `config.log' for more details.

And config.log informatively contains:

    sorry, unimplemented: Thumb-1 hard-float VFP ABI

This is an error message that comes deep from gcc source files.

If gcc says it does not support VFP with Thumb1, then let's disable that
combination in our menuconfig.

Prefer VFP over Thumb1, i.e. hide Thumb1 when we're not soft-float.

Signed-off-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Cc: Gustavo Zacarias <gustavo@zacarias.com.ar>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Arnout Vandecappelle (Essensium/Mind) <arnout@mind.be>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2015-11-03 23:50:01 +01:00
Benoît Thébaudeau
cc0773f2a8 arch/arm: use EABIhf by default with VFP
Set EABIhf as the default target ABI for the ARM processors that have or
may have a VFP unit, since this ABI is the most efficient in that case.
Of course, EABI can still be selected manually if needed.

[Peter: only default to EABIHF when we are sure the CPU has a VFP]
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2015-10-25 19:56:20 +01:00
Peter Korsgaard
8da1239a12 arch/Config.in.x86: drop trailing dot (.) from x1000 URL
And add an empty line below for clarity.

Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2015-10-20 11:32:03 +02:00
Ray Kinsella
968f5d5e59 arch/x86: add support for Intel X1000
The Intel X1000 is the Pentium class microprocessor that ships with
Galileo Gen 1/2. This patch adds changes to arch and toolchain-wrapper
to omit the lock prefix for the X1000.

[Thomas: tweak commit log and Config.in help text.]

Signed-off-by: Ray Kinsella <ray.kinsella@intel.com>
Reviewed-by: Arnout Vandecappelle (Essensium/Mind) <arnout@mind.be>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2015-10-20 10:04:52 +02:00
Vicente Olivert Riera
99122d6780 arch: add support for mips32r6 and mips64r6 variants
- Add support for mips32r6 and mips64r6 target architecture variants
- Disable unsupported gcc versions
- Disable unsupported binutils versions
- Disable unsupported external toolchains
- Disable unsuported C libraries
- Add a hook in order to make glibc compile for MIPS R6.

[Thomas: slightly tweak the glibc hack explanation, to make it
hopefully clearer.]

Signed-off-by: Vicente Olivert Riera <Vincent.Riera@imgtec.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2015-10-12 21:33:56 +02:00
Waldemar Brodkorb
4a92f6754a toolchain: add sparc64 architecture support
Introduce sparc64 architecture to buildroot.

Signed-off-by: Waldemar Brodkorb <wbx@openadk.org>
Acked-by: Gustavo Zacarias <gustavo@zacarias.com.ar>
Tested-by: Gustavo Zacarias <gustavo@zacarias.com.ar>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2015-10-10 12:51:45 +02:00
Vicente Olivert Riera
25677a717c arch/mips: remove some remaining mips1/2/3/4 bits
Signed-off-by: Vicente Olivert Riera <Vincent.Riera@imgtec.com>
Reviewed-by: Gustavo Zacarias <gustavo@zacarias.com.ar>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2015-10-09 23:15:49 +02:00
Peter Korsgaard
7deaa277fd arch/arm: add missing arm1136j-s variant
Identical to arm1136jf-s, except that is doesn't have a vfp unit.

Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2015-08-24 00:43:12 +02:00
Alexey Brodkin
3720e28d15 ARC: allow selection of MMU page size
Modern ARC cores (those sporting MMU of version 3 and 4) allow selection
of different page sizes (4, 8 or 16 kB) during ASIC design creation.
And it's important to build a toolchain with page size setting that matches
hardware.

Otherwise user-space applications will fail on execution due to
unexpected data layout/alignment etc.

[Thomas: slightly improve help text, fix indentation of help text.]

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Anton Kolesov <akolesov@synopsys.com>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Arnout Vandecappelle <arnout@mind.be>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2015-07-18 14:07:35 +02:00
Thomas Petazzoni
f410de4140 arch: aarch64 always has a MMU
Following the addition of AArch64 big endian, the AArch64 little
endian option had lost its 'select BR2_ARCH_HAS_MMU_MANDATORY', so
let's reintroduce it.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2015-07-12 18:34:42 +02:00
Bamvor Jian Zhang
827ba46556 aarch64: add big endian(aarch64_be) support
Add aarch64_be support. Note that CONFIG_CPU_BIG_ENDIAN should be
defined in kernel config when building a big endian kernel.

Signed-off-by: Zhang Jian(Bamvor) <bamvor.zhangjian@huawei.com>
Acked-by: Gustavo Zacarias <gustavo@zacarias.com.ar>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2015-07-12 18:32:37 +02:00
Guido Martínez
9971ebfe9d arm: update processor types
Add the Cortex M3 variant. These microcontrollers don't support regular
ARM instructions and don't have an MMU.

Signed-off-by: Guido Martínez <guido@vanguardiasur.com.ar>
Reviewed-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2015-06-28 14:32:25 +02:00
Guido Martínez
22d5501e03 arch: tidy up binary formats config
Instead of (black)listing architectures when deciding the binary format,
we can enable the ELF format only when using an MMU and FLAT only when
we're not. This mimics the logic in the Linux kernel for user binaries
support.

For FDPIC, we introduce a Kconfig option to enable its selection, and
have blackfin select it.

Signed-off-by: Guido Martínez <guido@vanguardiasur.com.ar>
Reviewed-by: Arnout Vandecappelle (Essensium/Mind) <arnout@mind.be>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2015-06-09 22:51:14 +02:00
Guido Martínez
29563047e0 arch: tidy up mmu config
Instead of blacklisting which architectures support MMUs (mandatorily
or optionally), introduce two Kconfig options that are selected by each
architecture in each case.

This simplifies the logic in BR2_USE_MMU.

Signed-off-by: Guido Martínez <guido@vanguardiasur.com.ar>
Acked-by: Arnout Vandecappelle (Essensium/Mind) <arnout@mind.be>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2015-06-09 22:49:39 +02:00
Max Filippov
083ec2df6c arch/Config.in.xtensa: provide BR2_ENDIAN symbol
Packages get hints from the buildroot at configure time, e.g.
ac_cv_c_bigendian=yes/no. This particular hint is based on the value of
BR2_ENDIAN and when it doesn't match actual toolchain endiannes the
build may break.
Provide BR2_ENDIAN for xtensa to fix this sort of build errors.

Fixes:
  http://autobuild.buildroot.net/results/31115fe8d88f52d77ed0f2da769eb8896a1b34a2/

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2015-05-05 22:44:04 +02:00
Waldemar Brodkorb
b49aeacfca sh64: deprecate support for this dead architecture
As discussed on the mailinglist, this should be deprecated
before removal.

[Thomas: don't add to Config.in.legacy.]

Signed-off-by: Waldemar Brodkorb <wbx@openadk.org>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2015-04-25 10:32:40 +02:00
Steven Noonan
f92e6219cf arch: add core-avx2
Signed-off-by: Steven Noonan <steven@uplinklabs.net>
Acked-by: Gustavo Zacarias <gustavo@zacarias.com.ar>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2015-04-09 23:34:14 +02:00
Steven Noonan
c060425f67 arch: add corei7-avx
Signed-off-by: Steven Noonan <steven@uplinklabs.net>
Acked-by: Gustavo Zacarias <gustavo@zacarias.com.ar>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2015-04-09 23:34:08 +02:00
Gustavo Zacarias
7428ffe337 arch/sparc: doesn't have atomics
Cores older than v9 don't seem to have atomics so remove it.
Fixes a test build of pulseaudio for example.

Signed-off-by: Gustavo Zacarias <gustavo@zacarias.com.ar>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2015-03-30 23:30:28 +02:00
Sonic Zhang
1b171af3b3 arch: BINFMT_FLAT_SHARED is not really shared for buildroot purposes
Although BINFMT_FLAT_SHARED is indeed a shared library format, it does
not support dynamic library loading with dlopen(). So for buildroot
purposes, BR2_STATIC_LIBS shouldn't be selected.

As it happens, the compiler options that are added for
BINFMT_FLAT_SHARED also make the compiler ignore the -static option, so
we can simply force BR2_STATIC_LIBS and things work out perfectly.

Therefore, remove the select of BR2_BINFMT_SUPPORTS_SHARED from
BINFMT_FLAT_SHARED, which in turn makes sure that BR2_STATIC_LIBS is
selected.

[Arnout: rewrite commit message, add explanatory comment]

Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Arnout Vandecappelle (Essensium/Mind) <arnout@mind.be>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2015-03-30 23:07:48 +02:00
Gustavo Zacarias
50451998f0 arch: add support for AMD steamroller
Add support for AMD steamroller optimizations, available in gcc 4.8+ as
bdver3.

Signed-off-by: Gustavo Zacarias <gustavo@zacarias.com.ar>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2015-03-04 22:16:41 +01:00
Yann E. MORIN
80be8753d5 arch/avr32: decommission for real
Now that we have absolutely zero reference to the avr32 architecture, we
can now really decommission the symbol.

Signed-off-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2015-02-14 17:46:42 +01:00
Yann E. MORIN
a46007daa7 arch: kill avr32
avr32 was slated for removal in 2015.02. Make it so!

This patch only definitively hides the symbol. When all references
to it are eradicated (to come in followup patches), we'll eventually
kill the symbol altogether.

Signed-off-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2015-02-14 17:39:50 +01:00
Guido Martínez
a87f5806ed arm: conditionally support regular ARM instructions
Until now, all ARM processors supported the original ARM instructions.
However, the Cortex-M variants don't support them, and support only
Thumb/Thumb2 modes.

So, make a Kconfig option for ARM support and use it.

[Thomas:
  - Remove the dependency in the choice between ARM/Thumb/Thumb-2,
    because basically the choice is now always visible.
  - Replace the BR2_ARM_INSTRUCTIONS_ARM_CHOICE choice option directly
    by BR2_ARM_INSTRUCTIONS_ARM, instead of having this blind option
    defined separately. This means the choice is now always visible,
    even when only the ARM instruction set is supported.]

Signed-off-by: Guido Martínez <guido@vanguardiasur.com.ar>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2015-02-02 18:32:34 +01:00
Thomas Petazzoni
158001f57b Turn the static lib option into a choice with more options
This commit turns the single static option into a choice, which offers
various possibilities:

 1. Build and use static libraries only;
 2. Build both shared and static libraries, but use shared libraries;
 3. Build and use shared libraries only.

On most platforms, (2) is currently the default, and kept as the
default in this commit. Of course, on certain platforms (Blackfin,
m68k), only option (1) will be available.

In addition to the introduction of the Config.in options, this commit
also:

 * Removes the 'select BR2_STATIC_LIBS' from 'BR2_BINFMT_FLAT', since
   with the use of a choice, we are guaranteed that BR2_STATIC_LIBS
   will be selected when the binary format is BR2_BINFMT_FLAT, since
   BR2_STATIC_LIBS will be the only possible solution in the choice.

 * Changes package/Makefile.in to use the proper
   --{enable,disable}-{shared,static} options for autotools packages.

[Thomas: remove useless empty newline right after 'choice'. Noticed by
Yann E. Morin.]

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Reviewed-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
2014-12-12 00:09:02 +01:00
Thomas Petazzoni
375c77ad4e arch: remove superfluous arch dependencies on BR2_BINFMT_FLAT_*
As noted by Yann E. Morin, those dependencies are unneeded, since FLAT
can anyway only be used on m68k and Blackfin.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2014-12-11 22:51:12 +01:00
Thomas Petazzoni
b85837e5d6 arch: introduce BR2_BINFMT_SUPPORTS_SHARED
In preparation for the refactoring of the static/shared library
support, we add a BR2_BINFMT_SUPPORTS_SHARED hidden option that binary
formats supporting shared libraries should select.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
2014-12-11 22:50:40 +01:00
Thomas Petazzoni
c1a38829e7 arch: ensure BR2_BINFMT_ELF is really used
Currently, the binary format choice is only shown for the Blackfin and
m68k architectures, since we assume that all other architectures are
using the ELF binary format. However, due to this, the BR2_BINFMT_ELF
symbol is in fact not set to 'y' for those architectures that use the
ELF format.

This will be causing problems for the refactoring of the static/shared
library support, as we will need to know if the binary format supports
shared libraries or not.

Therefore, we simply make the choice visible on all architectures,
even if it means that on many architectures no other choice than ELF
will be available.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
2014-12-11 22:49:14 +01:00
Thomas Petazzoni
c149083f93 arch: FDPIC is not supported on m68k
The current binfmt selection in arch/Config.in allows to select FDPIC
on m68k, which is incorrect. This commit fixes that, and makes sure
FDPIC is the default on Blackfin, while FLAT is the default on m68k.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
2014-12-11 22:48:57 +01:00
Thomas Petazzoni
665e13c85e Rename BR2_PREFER_STATIC_LIB to BR2_STATIC_LIBS
Since a while, the semantic of BR2_PREFER_STATIC_LIB has been changed
from "prefer static libraries when possible" to "use only static
libraries". The former semantic didn't make much sense, since the user
had absolutely no control/idea of which package would use static
libraries, and which packages would not. Therefore, for quite some
time, we have been starting to enforce that BR2_PREFER_STATIC_LIB
should really build everything with static libraries.

As a consequence, this patch renames BR2_PREFER_STATIC_LIB to
BR2_STATIC_LIBS, and adjust the Config.in option accordingly.

This also helps preparing the addition of other options to select
shared, shared+static or just static.

Note that we have verified that this commit can be reproduced by
simply doing a global rename of BR2_PREFER_STATIC_LIB to
BR2_STATIC_LIBS plus adding BR2_PREFER_STATIC_LIB to Config.in.legacy.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Reviewed-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
2014-12-11 22:48:13 +01:00
Gustavo Zacarias
cd88e49cd7 arch/powerpc: add fsl e5500 and e6500 support
Add Freescale E5500 and E6500 core support.
These can go in 32 or 64-bit mode.
I'm not aware of these being able to boot in LE mode so filter that out
until we get some feedback on it.

Signed-off-by: Gustavo Zacarias <gustavo@zacarias.com.ar>
Reviewed-by: "Matt Weber" <matthew.weber@rockwellcollins.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2014-12-07 23:46:41 +01:00
Gustavo Zacarias
dd45fe0efb arch/mips: remove deprecated mips1/2/3/4 support
Remove the support for generating mips1/2/3/4 code since it has been
deprecated for more than a year now.
Also remove the unnecessary kludges in packages for it.

Signed-off-by: Gustavo Zacarias <gustavo@zacarias.com.ar>
Acked-by: Vicente Olivert Riera <Vincent.Riera@imgtec.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-12-01 20:06:32 +01:00
Peter Korsgaard
80e4060908 arch/Config.in.x86: drop BR2_x86_generic
The fuzzy generic x86 variant doesn't make much sense in the context of
Buildroot, and the recent change to use -march instead of -mtune broke it.

From the GCC manual:

https://gcc.gnu.org/onlinedocs/gcc-4.9.2/gcc/i386-and-x86-64-Options.html#i386-and-x86-64-Options:

-mtune=cpu-type
    Tune to cpu-type everything applicable about the generated code,
    except for the ABI and the set of available instructions. While
    picking a specific cpu-type schedules things appropriately for that
    particular chip, the compiler does not generate any code that cannot
    run on the default machine type unless you use a -march=cpu-type
    option. For example, if GCC is configured for i686-pc-linux-gnu then
    -mtune=pentium4 generates code that is tuned for Pentium 4 but still
    runs on i686 machines.

    The choices for cpu-type are the same as for -march. In addition,
    -mtune supports 2 extra choices for cpu-type:

    ‘generic’
        Produce code optimized for the most common IA32/AMD64/EM64T
        processors. If you know the CPU on which your code will run,
        then you should use the corresponding -mtune or -march option
        instead of -mtune=generic. But, if you do not know exactly what
        CPU users of your application will have, then you should use
        this option.

        As new processors are deployed in the marketplace, the behavior
        of this option will change. Therefore, if you upgrade to a newer
        version of GCC, code generation controlled by this option will
        change to reflect the processors that are most common at the
        time that version of GCC is released.

        There is no -march=generic option because -march indicates the
        instruction set the compiler can use, and there is no generic
        instruction set applicable to all processors. In contrast,
        -mtune indicates the processor (or, in this case, collection of
        processors) for which the code is optimized.

Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-11-07 19:51:06 +01:00
Thomas Petazzoni
bc48f2312e arch: remove the BR2_GCC_TARGET_TUNE option
The BR2_GCC_TARGET_TUNE option is now unused, so we can get rid of it.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-11-07 00:16:47 +01:00
Thomas Petazzoni
db5e6d6c14 arch/m68k: get rid of BR2_GCC_TARGET_TUNE
On m68k, we are passing the exact same values of BR2_GCC_TARGET_ARCH
and BR2_GCC_TARGET_TUNE, which is redundant. Therefore, this commit
removes the usage of BR2_GCC_TARGET_TUNE on m68k.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Reviewed-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-11-07 00:14:13 +01:00
Thomas Petazzoni
75418c4cf6 arch/powerpc: get rid of BR2_GCC_TARGET_TUNE
According to the gcc documentation for PowerPC options:

'-mtune=CPU_TYPE'
     Set the instruction scheduling parameters for machine type
     CPU_TYPE, but do not set the architecture type, register usage, or
     choice of mnemonics, as '-mcpu=CPU_TYPE' would.  The same values
     for CPU_TYPE are used for '-mtune' as for '-mcpu'.  If both are
     specified, the code generated will use the architecture, registers,
     and mnemonics set by '-mcpu', but the scheduling parameters set by
     '-mtune'.

In the case of Buildroot where we only target a specific system, using
-mtune therefore doesn't make much sense, and using -mcpu would be
more appropriate. As a consequence, this patch makes PowerPC use
BR2_GCC_TARGET_CPU instead of BR2_GCC_TARGET_TUNE.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Reviewed-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-11-07 00:13:49 +01:00
Thomas Petazzoni
a5023c5204 arch/sparc: get rid of BR2_GCC_TARGET_TUNE
On SPARC, BR2_GCC_TARGET_TUNE was only used for one specific case, the
BR2_sparc_v8. There is actually no reason to not use
BR2_GCC_TARGET_CPU instead for this, as all values supported for
-mtune are also supported for -mcpu. Therefore, the only
BR2_GCC_TARGET_TUNE case is moved as a BR2_GCC_TARGET_CPU case.

[Peter: fixup merge conflict after 'sparc: Add leon3 cpu type and remove sparc{s,h}fleon{,v8}]
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Reviewed-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-11-07 00:13:08 +01:00
Thomas Petazzoni
6bec1d5191 arch/x86: get rid of BR2_GCC_TARGET_TUNE
According to the gcc documentation, -march implies -mtune on x86, so
defining both BR2_GCC_TARGET_ARCH and BR2_GCC_TARGET_TUNE is
redundant. Therefore, this commit removes the definition of
BR2_GCC_TARGET_TUNE on x86.

However, while doing so, it adds one new case for BR2_GCC_TARGET_ARCH:
using -march=generic when BR2_x86_generic is selected.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Reviewed-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-11-07 00:09:21 +01:00
Thomas Petazzoni
fd828fd98f arch/arm: remove BR2_GCC_TARGET_ARCH definitions on ARM
On ARM, we were defining both the CPU type and the architecture
variant. However, depending on the version of gcc, a given combination
of (CPU, architecture) may not be the same. Since the architecture
variant is implied by the CPU type, given the former is not necessary,
and we can simply specify the latter.

>From the gcc documentation:

  This specifies the name of the target ARM processor. GCC uses this
  name to derive the name of the target ARM architecture (as if
  specified by -march) and the ARM processor type for which to tune
  for performance (as if specified by -mtune). Where this option is
  used in conjunction with -march or -mtune, those options take
  precedence over the appropriate part of this option.

Note that we verified that for all BR2_GCC_TARGET_ARCH value that
existed, a proper BR2_GCC_TARGET_CPU value is defined.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-11-07 00:07:34 +01:00
Thomas Petazzoni
24dfbe71e0 arch/arm: do not distinguish revisions of ARM1136JF-S
In commit 88cf3bb917
("arch/Config.in.arm: Use armv6k for arm1136jf-s rev1"), Benoît
Thébaudeau added separate options for the revision 0 and revision 1 of
the ARM1136JF-S processor, so that different -march values could be
used (armv6j for revision 0, armv6k for revision 1).

However, this is preventing the removal of the BR2_GCC_TARGET_ARCH
option, which we need to do to give only the CPU type to gcc, and let
it decide the architecture variant that matches. This is because this
story of revision 0 vs. revision 1 is the only case where -mcpu
doesn't fully define the CPU.

Moreover, a quick test with gcc shows that -march=armv6j
-mcpu=arm1136jf-s is accepted, while -march=armv6k -mcpu=arm1136jf-s
makes gcc complain: " warning: switch -mcpu=arm1136jf-s conflicts with
-march=armv6k switch".

In addition, gcc 5 will apparently no longer allow to pass all of
--with-arch, --with-cpu and --with-tune, so we will anyway have to
rely only on one of them.

As a consequence, this commit basically reverts
88cf3bb917 and provides only one option
for ARM1136JF-S. If the two revisions are really different, then they
should be supported in upstream gcc with different -mcpu values.

Note that the removal of the two options should not break existing
full .config, since the hidden option BR2_arm1136jf_s becomes again a
visible option to select the CPU.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-11-07 00:05:11 +01:00
Alexey Brodkin
f787b51af5 arc: add support of ARC HS38 core
Synopsys has recently announced its new ARC HS38 core that is capable of
running Linux -
http://www.synopsys.com/dw/ipdir.php?ds=arc-hs38-processor

ARC HS38 is based on ARCv2 ISA and requires special settings of gcc and
libc.

Also in case of HS38 atomic extensions (LLOCK/SCOND instructions) are
built-in by default, so enabling atomic extensions in Buildroot as well.

This commit adds support of the core in buildroot.

[Peter: string type, so must be in quotes as noted by Yann]
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Anton Kolesov <anton.kolesov@synopsys.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-11-02 22:25:27 +01:00
Alexey Brodkin
11f078c22f arc: add explicit selection of CPU templates ARC 750D and ARC770D
This separation allows to specify unique options and features for each
CPU.

For example ARC 770D has LLOCK/SCOND instructions built-in by default.
Also this new scheme simplifies selection of proper configuration for
users - preconfigured options now match templates for ARC CPUs.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Anton Kolesov <akolesov@synopsys.com>
Reviewed-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-11-02 22:20:22 +01:00
Andreas Larsson
43b78e7285 arch: sparc: Add leon3 cpu type and remove sparc{s,h}fleon{,v8}
There is support for -mcpu=leon3 from gcc 4.8.3. Use this for LEON systems
instead of the non-mainline targets sparcsfleon, sparchfleon, sparcsfleonv8, and
sparchfleonv8.

[Thomas: add Config.in.legacy handling for the removed options.]

Signed-off-by: Andreas Larsson <andreas@gaisler.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2014-10-30 21:28:39 +01:00
Thomas Petazzoni
ece7daaa10 arch/arm: add blind options to know the ARM architecture
In preparation to the removal of BR2_GCC_TARGET_ARCH for ARM, this
commit introduces a number of blind options for each ARM architecture,
so that packages/toolchains that had dependencies using
BR2_GCC_TARGET_ARCH can continue to express their dependencies. It can
also be used to simplify package dependencies that were using the
individual ARM core options.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Reviewed-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
2014-10-25 12:35:00 +02:00
Thomas Petazzoni
d60489a6e5 arch: remove BR2_arm10t
The BR2_arm10t option is not correct as it references an ARM family,
while other options indicate a specific ARM core. The ARM cores in
ARM10 family are ARM1020E, ARM1022E and ARM1026EJ-S according to
Wikipedia. However, those are clearly very rare, and Wikipedia only
indicates two Conexant ADSL-related SoC as being part of this family
of ARM cores. Therefore, this commit removes this ARM family.

[Peter: remove nettle.mk reference as pointed out by Yann]
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-09-18 22:09:05 +02:00
Thomas Petazzoni
ad0e217bb2 arch: remove BR2_arm920 reference
The BR2_GCC_TARGET_CPU defines a value for the BR2_arm920 case, but
this option does not exist. Therefore, this commit removes one line of
dead code.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-09-18 22:05:11 +02:00
Yann E. MORIN
21c8f1e947 arch/arc: fix atomics selection
Due to a kconfig limitation, we can't select a no-prompt symbol that
gets its dependencies by being conditionally re-defined in one or more
if-blocks, like we currently do for BR2_ARCH_HAS_ATOMICS.

As a workaround to this issue, we just redefine that symbol in the arc
if-block, like we do for all other architectures, except that in the arc
case, the default value is conditional.

Reported-by: Anton Kolesov <Anton.Kolesov@synopsys.com>
[yann.morin.1998@free.fr: indepently re-done a patch similar to the one
 Thomas made on his own]
Signed-off-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-09-11 22:53:08 +02:00
Yann E. MORIN
a690fea1ac arch: remove no-longer default on atomics option
Now that all architectures explicitly select this option when it makes
sense, there is no need to have a default value.

Signed-off-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Anton Kolesov <Anton.Kolesov@synopsys.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-08-18 11:03:36 +02:00
Yann E. MORIN
6a1f8b712d arch/xtensa: always has atomic ops
Signed-off-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Anton Kolesov <Anton.Kolesov@synopsys.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-08-18 11:03:28 +02:00
Yann E. MORIN
4f07578a86 arch/x86: all x86 but i386 has atomics operations
Signed-off-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Anton Kolesov <Anton.Kolesov@synopsys.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-08-18 11:03:16 +02:00
Yann E. MORIN
da86e94f80 arch/sparc: always has atomic ops
Signed-off-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Anton Kolesov <Anton.Kolesov@synopsys.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-08-18 11:03:09 +02:00
Yann E. MORIN
5d22b6e06c arch/sh: always has atomic ops
Signed-off-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Anton Kolesov <Anton.Kolesov@synopsys.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-08-18 11:03:02 +02:00
Yann E. MORIN
84e8a337d5 arch/powerpc: always has atomic ops
Signed-off-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Anton Kolesov <Anton.Kolesov@synopsys.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-08-18 11:02:57 +02:00
Yann E. MORIN
700080c494 arch/nios2: always has atomic ops
Signed-off-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Anton Kolesov <Anton.Kolesov@synopsys.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-08-18 11:02:51 +02:00
Yann E. MORIN
4e99ab9bd7 arch/mips: always has atomic ops
Signed-off-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Anton Kolesov <Anton.Kolesov@synopsys.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-08-18 11:02:41 +02:00
Yann E. MORIN
85da209efb arch/microblaze: always has atomic ops
Signed-off-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Anton Kolesov <Anton.Kolesov@synopsys.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-08-18 11:02:31 +02:00
Yann E. MORIN
0d79bc13ec arch/m68k: always has atomic ops
Signed-off-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Anton Kolesov <Anton.Kolesov@synopsys.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-08-18 11:01:40 +02:00
Yann E. MORIN
5b98309f59 arch/bfin: always has atomic ops
Signed-off-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Anton Kolesov <Anton.Kolesov@synopsys.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-08-18 11:01:31 +02:00
Yann E. MORIN
116f63f4d7 arch/avr32: always has atomic ops
Signed-off-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Anton Kolesov <Anton.Kolesov@synopsys.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-08-18 11:01:22 +02:00
Yann E. MORIN
b8a8263858 arch/arm: always has atomic ops
armv6 and above all have one sort of atomic ops or another. For armv5
and below, they are emulated, either as a kernel trap, a kernel VDSO,
or compiler intrinsics.

Aarch64 is just armv8, so make it a single commit. ;-)

Signed-off-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Anton Kolesov <Anton.Kolesov@synopsys.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-08-18 11:00:51 +02:00
Yann E. MORIN
6172ceb3cf toolchain: drop the now-unused old BR2_TOOLCHAIN_HAS_ATOMIC_INTRINSICS
It's now been replaced with BR2_ARCH_HAS_ATOMICS, annd all packages have
been changed to use that instead.

Signed-off-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Cc: Anton Kolesov <Anton.Kolesov@synopsys.com>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-08-18 10:57:55 +02:00
Yann E. MORIN
1b5f0fc8df arch: add an option to specify if the arch has atomic ops
The fact that atomic operations are available is not really a
specificity of the toolchain, but rather of the architecture.

So, add a new option that architectures that have atomic operations
can select. This in turn selects the current toolchain atomic option,
until all packages have been converted, at which point the old
toolchain option can be removed.

Reported-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Cc: Anton Kolesov <Anton.Kolesov@synopsys.com>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-08-18 10:56:35 +02:00
Anton Kolesov
cbffd50561 toolchain: Add config option for atomic intrinsics
GCC has several builtin functions that implement atomic operations. Those
functions are architecture specific and may not be implemented by the
specific toolchain. In case of GCC for ARC those functions rely on
LLOCK/SCOND instructions which are optional in ARC CPU's. If ARC CPU doesn't
support those instructions but software tries to use them, then application
will be aborted with Illegal instruction exception. To avoid confusion user
should first specify that their CPU supports atomic extension, which will
allow selection of packages that use builtin atomic functions.

Signed-off-by: Anton Kolesov <Anton.Kolesov@synopsys.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2014-08-03 11:20:47 +02:00
Peter Korsgaard
c2444e94ce arch: avr32 should only get removed for the 2015.02 release
As discussed on the list.

Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-07-10 22:05:55 +02:00
Thomas Petazzoni
01efcf84fe arch: deprecate the AVR32 architecture
The AVR32 architecture from Atmel is obsolete since a long time, not
supported upstream in most of the toolchain components (requires a
special version of gcc, an old version of uClibc, etc.). Until
February, Simon Dawson was making an excellent job at maintaining
AVR32 in Buildroot, and fixing all the issues caused by this
architecture. However, Simon focus has changed, and despite his call
for a new maintainer for AVR32 in Buildroot, nobody stepped up.

The issue of maintaining AVR32 is becoming worse and worse, so this
patch proposes to deprecate it for 2014.08, but keeping the support
around, to remove it for sure in 2014.11.

Cc: Simon Dawson <spdawson@gmail.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Gustavo Zacarias <gustavo@zacarias.com.ar>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-07-10 16:49:36 +02:00
Cody P Schafer
7e674dfa4f powerpc: add powerpc64 and powerpc64le support
This enables powerpc64 and powerpc64le. Currently, le needs at least
glibc 2.19 and gcc 4.9.0. For gdb, 7.7.1 works (added in an earlier
patch).

[Peter: also disallow gcc 4.8 for ppc64le]
Signed-off-by: Cody P Schafer <cody@linux.vnet.ibm.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-05-26 21:48:33 +02:00
Cody P Schafer
32a471824b powerpc: remove unneeded dependencies
Signed-off-by: Cody P Schafer <cody@linux.vnet.ibm.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-05-26 21:22:09 +02:00
Cody P Schafer
71badded4b powerpc: add power{4,5,6,7,8} cpus
Signed-off-by: Cody P Schafer <cody@linux.vnet.ibm.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-05-26 21:18:10 +02:00
Cody P Schafer
32025e99dd powerpc: mark 32-bit only powerpc cpus to prep for adding powerpc64 support
Signed-off-by: Cody P Schafer <cody@linux.vnet.ibm.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-05-26 21:17:26 +02:00
Cody P Schafer
40e58dab0c powerpc: add BR2_POWERPC_CPU_HAS_ALTIVEC to replace adhoc deps/checks
Signed-off-by: Cody P Schafer <cody@linux.vnet.ibm.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-05-26 21:14:08 +02:00
Cody P Schafer
b4c824562b powerpc: add BR2_POWERPC_CPU_HAS_SPE to replace adhoc deps/checks
Signed-off-by: Cody P Schafer <cody@linux.vnet.ibm.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-05-26 14:28:59 +02:00
Jeff Bailey
a426a91973 Add support for powerpc64le
This patch adds support for powerpc64le-linux-gnu.  This includes
needed patches to fakeroot and gmp.

gmp patch is from upstream HG tree.
fakeroot patch is from Ubuntu written by Adam Conrad.

Signed-off-by: Jeff Bailey <jeffbailey@google.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-05-25 23:24:09 +02:00
Gustavo Zacarias
befab216a2 arch/arm: drop ARM(7TDMI/720T/740T) support
The toolchain currently doesn't build for nommu ARM and is in need of
serious work.
Problem is there are no emulation targets and real ARM(7TDMI/720T/740T)
hardware that's capable of running linux (enough memory, having a
memory controller...) is VERY rare and uses very old versions to
make it usable.

The ARM nommu focus should go into Cortex M series processors that are
obtainable at reasonable cost on modern hardware that has external
memory controllers.

Signed-off-by: Gustavo Zacarias <gustavo@zacarias.com.ar>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-05-08 16:53:49 +02:00
Bernd Kuhls
affb6a3853 arch: add support for "corei7" Intel CPU optimisations
gcc support was added in version 4.6:
http://gcc.gnu.org/gcc-4.6/changes.html

Signed-off-by: Bernd Kuhls <bernd.kuhls@t-online.de>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-05-03 03:39:29 +02:00
Gustavo Zacarias
a8b3db9d3e arm: update processor types
Update the arm processor types: add the cortex A12 variant supported by
gcc 4.9.x

Signed-off-by: Gustavo Zacarias <gustavo@zacarias.com.ar>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-04-24 13:45:32 +02:00
Vicente Olivert Riera
574fa145d8 Disable o32 ABI for MIPS64 architectures
Building o32 ELF files for MIPS64 is an exotic configuration that nobody
should be using. If o32 is required, then is better if it's built for
MIPS 32-bit cores so only 32-bit instructions will be used leading to a
more efficient o32 usage.

Signed-off-by: Vicente Olivert Riera <Vincent.Riera@imgtec.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-03-28 12:51:46 +01:00
Jan Drazil
c220581c78 Fix microblize little endian toolchain
Buildroot toolchain creates big endian binaries instead of little endian
ones for microblaze architecture. The reason is wrong BR2_ARCH string.
KERNEL_ARCH must contain microblaze in both cases.

Signed-off-by: Jan Drazil <xdrazi00@stud.fit.vutbr.cz>
Signed-off-by: Jan Viktorin <xvikto03@stud.fit.vutbr.cz>
Acked-by: Gustavo Zacarias <gustavo@zacarias.com.ar>
Tested-by: Gustavo Zacarias <gustavo@zacarias.com.ar>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-03-20 16:46:29 +01:00
Thomas Petazzoni
e543f5a104 arch: remove sh2, sh3 and sh3eb support
This patch removes the sh2, sh3 and sh3eb support, because the user
base is inexistent, and the Linux support for these architectures is
poor. The sh2a support is preserved, because at least one user
expressed interest in this architecture, and is actually using it:

  http://lists.busybox.net/pipermail/buildroot/2013-April/070399.html

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-02-05 12:05:58 +01:00
Thomas Petazzoni
dd712eb31c arch: remove incorrect condition for endian definition on SuperH
Probably due to some copy/paste mistake, Config.in.sh was defining
BR2_ENDIAN to "LITTLE" when the architecture is BR2_x86_64. Due to the
fact that Config.in.sh is never included when we are building for
x86_64, this is a no-op, but is certainly good to clean up.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-02-04 15:15:11 +01:00
Adrien Béraud
485f07dd4c arch: use BR2_X86_CPU_HAS_SSE4, SSE42 with jaguar
This follow-up commit adds support for SSE 4 and SSE 4.2 to
the jaguar architecture.

Signed-off-by: Adrien Béraud <adrien.beraud@savoirfairelinux.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-01-20 22:21:11 +01:00
Adrien Béraud
a20cb38659 arch: add support for "jaguar" AMD CPU optimisations
AMD Jaguar ( https://en.wikipedia.org/wiki/Jaguar_%28microarchitecture%29 ) is
suddenly a popular architecture since it is used in the PS4 and the XBox One.
Many embedded systems are also likely to use it in the next years.

This patch adds support for GCC architecture-specific optimisations and
tuning for these CPUs.
These optimizations are available with GCC 4.8+.

Signed-off-by: Adrien Beraud <adrien.beraud@savoirfairelinux.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-01-15 23:19:46 +01:00
Bernd Kuhls
0e8e3c2879 ffmpeg: Add sse4 related options BR2_X86_CPU_HAS_SSE4 / BR2_X86_CPU_HAS_SSE4
Signed-off-by: Bernd Kuhls <berndkuhls@hotmail.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-01-13 22:28:42 +01:00
Thomas De Schampheleire
ba4ad9d27c deprecated handling: introduce BR2_DEPRECATED_SINCE_xxxx_xx
In order to keep better track of when a feature got deprecated, and hence
when it can be removed, a new set of symbols BR2_DEPRECATED_SINCE_xxxx_xx is
introduced. These symbols are automatically selected when BR2_DEPRECATED is
selected, and thus are transparent to the user.
A deprecated feature will no longer depend on BR2_DEPRECATED directly, but
rather on the appropriate BR2_DEPRECATED_SINCE_xxxx_xx. If that symbol does
not yet exist, it has to be created in Config.in.
When removing a deprecated feature, one should also check whether this was
the last feature using the BR2_DEPRECATED_SINCE_xxxx_xx symbol, in which
case the latter can be removed from Config.in.

A followup patch will make sure the overview is added to the list of
deprecated features in the manual, so that a buildroot core developer can
easily determine which features to remove in a given development cycle.

Signed-off-by: Thomas De Schampheleire <thomas.de.schampheleire@gmail.com>
Acked-by: Arnout Vandecappelle (Essensium/Mind) <arnout@mind.be>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-01-10 15:03:53 +01:00
Vicente Olivert Riera
b10a40535d Disable MIPS64 ISAs for MIPS32 targets
Currently you can select MIPS64 ISAs, like mips64 and mips64r2, for
MIPS32 targets. This is incorrect, so we disable the possibility to do
that.

Reviewed-by: Markos Chandras <markos.chandras@imgtec.com>
Signed-off-by: Vicente Olivert Riera <vincent.riera@imgtec.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2014-01-03 20:43:25 +01:00
Thomas Petazzoni
d3539dd53b arch: pass cpu option instead of tune option on ARM
Currently, the ARM Config.in logic specifies values for
--with-arch/-march and --with-tune/-mtune, but not for
--with-cpu/-mcpu. However, this causes problems on ARMv4, because
specifying --with-arch=armv4t isn't enough to make gcc generate ARMv4
code: one should also pass --with-cpu=<some ARMv4 CPU>.

Moreover, since Buildroot is generally designed to generate code
specifically for the configured target, it makes sense to give our own
--with-cpu/-mcpu value instead of relying on the default value used by
gcc, and only do small optimizations with -mtune.

Reported-by: Adam Hussein <kryme76@yahoo.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
2013-12-26 23:19:04 +01:00
Mischa Jonker
26cc49f6c6 Revert "arc: Add option for ARC-specific download site"
All packages use github now.

This reverts commit 1445b7fd2e.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2013-12-06 22:45:13 +01:00
Peter Korsgaard
50ce7ffb76 Merge branch 'next'
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2013-12-01 20:32:00 +01:00
Gustavo Zacarias
8aaede24c4 arch/sparc: drop unused variants
Drop stale v9/ultrasparc/niagara variants.

Signed-off-by: Gustavo Zacarias <gustavo@zacarias.com.ar>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2013-11-28 15:18:29 +01:00
Vicente Olivert Riera
831dad2d61 Mark MIPS I, II, III and IV as deprecated
Deprecate old MIPS ISAs since they are rarely used anymore and they cause
multiple build problems for new packages

Signed-off-by: Vicente Olivert Riera <Vincent.Riera@imgtec.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2013-11-20 13:44:27 +01:00
Simon Dawson
d7ec9463e2 avr32: pass target arch to gcc
As suggested by Alexander Lukichev and Thomas Petazzoni on the mailing list,
only one of the two avr32 microarchitectures is relevant for Buildroot:
avr32 Linux implies the avr32b microarchitecure, as used in the ap7000.

Signed-off-by: Simon Dawson <spdawson@gmail.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2013-11-06 22:37:42 +01:00
Gustavo Zacarias
957a986214 arch/Config.in: introduce BR2_KERNEL_64_USERLAND_32 symbol
On some architectures one can be running a 64-bit kernel with a 32-bit
userland. Such is the case for sparc64 (unsupported) for example and
mips64 with n32 ABI.

Some tools that interface directly with the kernel need to be built
specially for this, so introduce this symbol to tweak their build in
one central kludge to be future-proof.

Example: bug .

Signed-off-by: Gustavo Zacarias <gustavo@zacarias.com.ar>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2013-10-30 22:59:03 +01:00
Markos Chandras
f60dafe068 arch/mips: Set BR2_GCC_TARGET_ARCH for MIPS
Set --with-arch instead of --with-tune for MIPS so that the
generated code will be optimal for the given MIPS ISA.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2013-10-30 18:44:12 +01:00
Yann E. MORIN
2b5650cf7f targets: move target options to their own sub-menu
Currently, all target options lie in the top-level menu.
This looks a bit clumsy, since all other options are neatly
folded into their own sematic sub-menus each.

Move the target option into their own sub-menu too.

Signed-off-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Acked-by: Thomas De Schampheleire <thomas.de.schampheleire@gmail.com>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2013-09-05 15:45:24 +02:00
Ezequiel Garcia
830205c036 nios2: Add new architecture
This commit adds very basic support to build for the Nios II
architecture. Toolchain support is still missing and instead
we need to use an external custom toolchain.

Notice that this architecture had been previously removed in
Buildroot 2010.05-rc1 release (as explained in the CHANGES file)
and this commit adds it back.

Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2013-09-02 21:38:45 +02:00
Gustavo Zacarias
79310d3275 arch/arm: add support for thumb(1) mode
[Peter: also adjust BR2_GCC_TARGET_MODE]
Signed-off-by: Gustavo Zacarias <gustavo@zacarias.com.ar>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2013-07-18 00:25:07 +02:00
Thomas Petazzoni
8316801f34 arch/arm: update VFPv2 comment to mention ARMv5
Commit 6b3a0417c4 ('arch/arm: arm926 may have VFP') forgot to update
the help text of the VFPv2 option to mention ARMv5. This commit fixes
that.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2013-07-18 00:25:06 +02:00
Gustavo Zacarias
6b3a0417c4 arch/arm: arm926 may have VFP
The VFP9-S FPU (VFPv2) is optional for ARM926EJ-S, see:
http://www.arm.com/products/processors/classic/arm9/arm926.php?tab=Specifications+
Real silicon:
http://www.nxp.com/documents/data_sheet/LPC3180.pdf

Signed-off-by: Gustavo Zacarias <gustavo@zacarias.com.ar>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2013-07-17 07:29:27 +02:00
Thomas Petazzoni
8211ee3c59 arch: use tabs instead of spaces in Config.in files
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2013-07-16 15:32:31 +02:00
Thomas Petazzoni
85d0769ac5 arch/arm: add support for Thumb2
Until now, we were using the default ARM instruction set, as used by
the toolchain: the 32 bits ARM instruction set for the internal
backend, and for external toolchain, whatever default was chosen when
the toolchain was generated.

This commit adds support for the Thumb2 instruction set. To do so, it:

 * provides a menuconfig choice between ARM and Thumb2. The choice is
   only shown when Thumb2 is supported, i.e on ARMv7-A CPUs.

 * passes the --with-mode={arm,thumb} option when building gcc in the
   internal backend. This tells the compiler which type of
   instructions it should generate.

 * passes the m{arm,thumb} option in the external toolchain
   wrapper. ARM and Thumb2 code can freely be mixed together, so the
   fact that the C library has been built either ARM or Thumb2 and
   that the rest of the code is built Thumb2 or ARM is not a problem.

[Peter: fix empty BR2_GCC_TARGET_MODE check]
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2013-07-16 15:28:03 +02:00
Thomas Petazzoni
5f959a1c61 arch: improve ARM floating point support and add support for EABIhf
This commit introduces the support for the EABIhf ABI, next to the
existing support we have for EABI and OABI (even though OABI support
is deprecated). EABIhf allows to improve performance of floating point
workload by using floating point registers to transfer floating point
arguments when calling functions, instead of using integer registers
to do, as is done in the 'softfp' floating point model of EABI.

In addition to this, this commit introduces a list of options for the
floating point support:
 * Software floating point
 * VFP
 * VFPv3
 * VFPv3-D16
 * VFPv4
 * VFPv4-D16

and it introduces some logic to make sure the options are only visible
when it makes sense, depending on the ARM core being selected. This is
however made complicated by the fact that certain VFP capabilities are
mandatory on some cores, but optional on some other cores. The kconfig
logic tries to achieve the following goals:

 * Hide options that are definitely not possible.

 * Use safe default values (i.e for Cortex-A5 and A7, the presence of
   the VFPv4 unit is optional, so we default on software floating
   point on these cores)..

 * Show the available possibilities, even if some of them are not
   necessarily working on a particular core (again, for the Cortex-A5
   and A7 cores, there is no way of knowing whether the particular
   variant used by the user has VFPv4 or not, so we select software
   floating point by default, but still show VFP/VFPv3/VFPv4 options).

It is worth noting that this commit doesn't add support for all
possible -mfpu= values on ARM. We haven't added support for fpa, fpe2,
fpe3, maverick (those four are only used on very old ARM cores), for
vfpv3-fp16, vfpv3-d16-fp16, vfpv3xd, vfpv3xd-fp16, neon-fp16,
vfpv4-sp-d16. They can be added quite easily if needed thanks to the
new organization of the Config.in options.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2013-07-16 14:42:12 +02:00
Thomas Petazzoni
9b3e72b4fd arch: Refactor BR2_SOFT_FLOAT into per-architecture options
As we are going to introduced a more advanced support of floating
point options for the ARM architecture, we need to adjust how the
soft-float option is handled. We replace the current hidden option
BR2_PREFER_SOFT_FLOAT option and the visible BR2_SOFT_FLOAT option by:

 * A global hidden BR2_SOFT_FLOAT option, defined in arch/Config.in,
   that tells whether the architecture-specific code is using software
   emulated floating point. This hidden option can be used throughout
   Buildroot to determine whether soft float is used or not.

 * Per-architecture visible BR2_<arch>_SOFT_FLOAT options, for the
   architecture for which it makes sense, which allows users to select
   soft float emulation when needed.

This change will allow each architecture to have a different way of
presenting its floating point capabilities.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2013-07-16 14:35:07 +02:00
Thomas Petazzoni
d774551787 arch: introduce BR2_GCC_TARGET_{FPU, FLOAT_ABI}
Buildroot already has the BR2_GCC_TARGET_{TUNE,ARCH,ABI,CPU} hidden
kconfig strings that allow per-architecture Config.in files to feed
the appropriate values of --with-{tune,arch,abi-cpu} when building
gcc, or the appropriate flags for the external toolchain wrapper.

This commit has two additional options:
BR2_GCC_TARGET_{FPU,FLOAT_ABI}, that allows to define the
--with-{fpu,float} gcc configure options for the internal backend, or
the -m{fpu,float-abi} options for the flags of the external toolchain
wrapper.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2013-07-16 13:44:00 +02:00
Yann E. MORIN
de1b4f99ae arch/arm: remove setting gcc's apcs-gnu ABI (aka OABI)
Signed-off-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2013-07-14 22:11:32 +02:00
Yann E. MORIN
adf9646229 arch/arm: remove OABI option
OABI is more than legacy, it's dead.

New developments should go with EABI, since it so much better.
>From the Debian EABI page [0] :
  - floating point performance, with or without an FPU is very much faster
  - mixing soft and hardfloat code is possible
  - structure packing is not as painful as it used to be
  - a more efficient syscall convention
  - more compatibility with various tools

[0] http://wiki.debian.org/ArmEabiPort

[Thomas: keep the ABI choice, as we are going to introduce EABIhf later].
Signed-off-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2013-07-14 22:09:45 +02:00
Kelvin Cheung
9d19151351 arm: update processor types
Update arm architecture variant: add the cortex A7.

Signed-off-by: Kelvin Cheung <keguang.zhang@gmail.com>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2013-06-16 21:12:36 +02:00
Sonic Zhang
57c0543291 arch: toolchain: Introduce binary format FLAT types.
Just introduce the symbol and options in arch generic Config.in.
Add FLAT types specific compiling flags into package makefile.

Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2013-05-05 22:54:37 +02:00
Sonic Zhang
66d41890ec arch: toolchain: Introduce target CPU revision.
Adds the possibility to have a free-form CPU revision string and append it
to the target CPU. Only Blackfin actually uses this option.

Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2013-05-05 22:49:50 +02:00
Sonic Zhang
371e6dc780 arch: Add blackfin CPU choice
This patch adds a Target CPU configuration option and uses it to select
a -m option for gcc.

Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2013-05-05 22:48:47 +02:00
Sonic Zhang
57133825c9 arch: toolchain: Introduce binary formats BINFMT_*.
Just introduce the symbol and options in arch generic Config.in.
Append FLAT format link flags to external toolchain wrapper.

Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2013-05-05 22:46:37 +02:00
Mischa Jonker
1445b7fd2e arc: Add option for ARC-specific download site
As ARC support is not yet in all upstream packages, a different location is
required to download the packages from. This adds an option to specify a
site for ARC-specific versions of packages such as binutils, gcc.

When ARC support has been upstreamed for all packages, this option can be
removed again.

Signed-off-by: Mischa Jonker <mjonker@synopsys.com>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2013-05-04 23:03:38 +02:00
Mischa Jonker
14f48861b5 arc: Add ARC and ARC BE architecture
Synopsys' DesignWare ARC Processor Cores are a family of 32-bit CPUs that
can be used from deeply embedded to high performance host applications.

Signed-off-by: Mischa Jonker <mjonker@synopsys.com>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2013-05-04 22:58:46 +02:00
Gustavo Zacarias
8f434ff274 toolchain/arm: add support for Marvell PJ4
Signed-off-by: Gustavo Zacarias <gustavo@zacarias.com.ar>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2013-04-29 22:22:49 +02:00
Gustavo Zacarias
9474421da3 toolchain/arm: drop generic and old, add fa526/626, unify strongarm
* Add Faraday FA526/626 as suggested on bug 
Note however that these cores are v4 and NOT v4t.

* Make the sa110 & sa1110 cores -> strongarm since they're the same.

* Drop all of the ARM variants lower than v4 including generic, there's
no point in supporting obsolete targets.

* Fix uClibc USE_BX logic, it was always on, this would break the new
FA526/626 support and broke StrongARM since it's a v4 core.

Signed-off-by: Gustavo Zacarias <gustavo@zacarias.com.ar>
Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2013-04-11 09:22:48 +02:00
Thomas Petazzoni
8e7b4ae8d2 Mark AArch64 as a 64 bits architecture
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2013-03-18 16:58:21 +01:00
Yann E. MORIN
58c2500e2a arch/arm: fix-up the ARM Kconfig warning
Kconfig does not accepts that a symbol that is part of a choice
be affected a default value.

Fix this by introducing a dummy EABI symbol, and make the real
EABI symbol a prompt-less option that depends on !OABI.

[Peter: drop arm dependency, rename to EABI_CHOICE]
Signed-off-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Cc: Peter Korsgaard <jacmet@uclibc.org>
Cc: Arnout Vandecappelle <arnout@mind.be>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2013-02-07 20:39:26 +01:00
Arnout Vandecappelle (Essensium/Mind)
c4cfa85b79 arm: deprecate OABI
The BR2_ARM_EABI config symbol is still kept in order to minimize
the impact.

Signed-off-by: Arnout Vandecappelle (Essensium/Mind) <arnout@mind.be>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2013-02-07 08:44:05 +01:00
Benoît Thébaudeau
88cf3bb917 arch/Config.in.arm: Use armv6k for arm1136jf-s rev1
According to the ARM1136JF-S and ARM1136J-S Revision r1p5 Technical Reference
Manual, from release rev1 (r1pn), the ARM1136JF-S processor implements the ARMv6
instruction set with the ARMv6k additions.

This patch differentiates the ARM1136JF-S revisions 0 and 1 in order to use
either ARMv6j (e.g. on Freescale i.MX31) or ARMv6k (e.g. on Freescale i.MX35).

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2013-02-02 08:28:22 +01:00
Gustavo Zacarias
16bcf46a63 arch/sparc: drop old SUN-specific variants
Drop the old Sun-specific variants used in old workstations (pre-1997)
and other useless ones.

The V7 ISA is a very old cpu only used in the first Sun workstations,
the toolchain support is broken: the cpu doesn't do hardware div and
it's not handled elsewhere.

The sparclite is also a very old Fujitsu cpu only used in early 90s Sun
machines (includes f930 & f934).

The sparclet (tsc701) was a microcontroller-variant.

The supersparc and hypersparc are just V8 variants also used in old Sun
workstations/servers.

Signed-off-by: Gustavo Zacarias <gustavo@zacarias.com.ar>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2013-01-02 14:59:55 +01:00
Richard Braun
2a27ad3d79 arch: fix BR2_ARCH for generic target variant
Signed-off-by: Richard Braun <rbraun@sceen.net>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2012-12-20 15:15:24 +01:00
Peter Korsgaard
f9da98c85d arch/Config.in.arm: Add BR2_ARM_CPU_HAS_NEON similar to how mmx/sse is handled on x86
NEON support is optional on A5/A9, so let the user choose if SoC has it /
wants to use it.

Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2012-12-13 23:25:53 +01:00
Gustavo Zacarias
10d042ad34 arm: update processor types
Update the arm processor types: add the cortex A5 & A15 variants.

Signed-off-by: Gustavo Zacarias <gustavo@zacarias.com.ar>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2012-12-09 23:07:11 +01:00
Gustavo Zacarias
1291304d7e powerpc: update processor types
Update the powerpc processor types.
Remove the 801, it's the original IBM experimental implementation.
Add the 464, 464fp, 476 and 476fp cores.

Signed-off-by: Gustavo Zacarias <gustavo@zacarias.com.ar>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2012-12-09 23:07:03 +01:00
Chris Zankel
fdd5bc948e xtensa: use uppercase for configurations and modified overlay structure
Except for architecture and processor names, buildroot uses capitalized
configuration names, so change the macro names for xtensa to follow that
standard.
Change the overlay file to have a subdirectory for each component
(gdb, binutils, gcc, etc.) to make it more future-prove.

Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2012-11-21 11:08:50 +01:00
Thomas Petazzoni
171075ed4f arch: Config.in string configuration options must be quoted
Suggested by Yann E. Morin.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Reported-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Acked-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2012-11-15 16:39:51 +01:00
Chris Zankel
d8792a04ca xtensa: support configurable processor configurations
Xtensa is a configurable processor architecture, which allows to define
additional instructions and registers. The required variant specific
information for the toolchain is delivered in an 'overlay' file, which
needs to be 'untarred' to the corresponding directories after the
source is installed and patched.
This patch provides support for binutils, gcc, and gdb with a very
limited changes to the build scripts. These additions are only executed
for the Xtensa architecture and have no effect on other architectures.

[Thomas: rebased on top of the 'arch: improve definition of gcc mtune,
mcpu, etc.' patch, and changed 'Target ABI' to 'Target Architecture
Variant'].

Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2012-11-15 16:39:48 +01:00
Chris Zankel
75720db391 xtensa: add support for the Xtensa architecture
The Xtensa architecture had been removed because it required special
handling and depended on additional directories and files that became
obsolete over time. This change is more aligned to other architectures.

[Thomas: rebased on top of the "arch: improve definition of gcc mtune,
mcpu, etc." patch].

Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2012-11-15 16:39:43 +01:00
Thomas Petazzoni
44c04a2b4a arch: improve definition of gcc mtune, mcpu, etc.
As suggested by Yann E. Morin, there is a better way than our current
big Config.in.common to define the gcc mtune, mcpu, march,
etc. values. We can split the setting of those values in each
architecture file, which makes a lot more sense.

Therefore, the Config.in file now creates empty kconfig variables
BR2_ARCH, BR2_ENDIAN, BR2_GCC_TARGET_TUNE, BR2_GCC_TARGET_ARCH,
BR2_GCC_TARGET_ABI and BR2_GCC_TARGET_CPU. The values of those
variables are set by the individual Config.in.<arch> files. This is
possible because such files are now only conditionally included
depending on the top-level architecture that has been selected.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2012-11-15 16:12:46 +01:00
Thomas Petazzoni
79ee3c1f84 Split target/Config.in.arch into multiple Config.in.* in arch/
target/Config.in.arch had become too long, and we want to remove the
target/ directory. So let's move it to arch/ and split it this way:

 * An initial Config.in that lists the top-level architecture, and
   sources the arch-specific Config.in.<arch> files, as well as
   Config.in.common (see below)

 * One Config.in.<arch> per architecture, listing the CPU families,
   ABI choices, etc.

 * One Config.in.common that defines the gcc mtune, march, mcpu values
   and other hidden options.

[Peter: space->tab fix, mipsel64 little endian, mips3 as noted by Arnout]
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2012-11-04 12:51:38 +01:00