arm: update processor types

Update the arm processor types: add the cortex A5 & A15 variants.

Signed-off-by: Gustavo Zacarias <gustavo@zacarias.com.ar>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
This commit is contained in:
Gustavo Zacarias 2012-12-09 11:54:03 +00:00 committed by Peter Korsgaard
parent 1291304d7e
commit 10d042ad34
2 changed files with 11 additions and 3 deletions

View File

@ -29,10 +29,14 @@ config BR2_arm1176jz_s
bool "arm1176jz-s"
config BR2_arm1176jzf_s
bool "arm1176jzf-s"
config BR2_cortex_a5
bool "cortex-A5"
config BR2_cortex_a8
bool "cortex-A8"
config BR2_cortex_a9
bool "cortex-A9"
config BR2_cortex_a15
bool "cortex-A15"
config BR2_sa110
bool "sa110"
config BR2_sa1100
@ -83,8 +87,10 @@ config BR2_GCC_TARGET_TUNE
default "arm1136jf-s" if BR2_arm1136jf_s
default "arm1176jz-s" if BR2_arm1176jz_s
default "arm1176jzf-s" if BR2_arm1176jzf_s
default "cortex-a5" if BR2_cortex_a5
default "cortex-a8" if BR2_cortex_a8
default "cortex-a9" if BR2_cortex_a9
default "cortex-a15" if BR2_cortex_a15
default "strongarm110" if BR2_sa110
default "strongarm1100" if BR2_sa1100
default "xscale" if BR2_xscale
@ -102,8 +108,10 @@ config BR2_GCC_TARGET_ARCH
default "armv6j" if BR2_arm1136jf_s
default "armv6zk" if BR2_arm1176jz_s
default "armv6zk" if BR2_arm1176jzf_s
default "armv7-a" if BR2_cortex_a5
default "armv7-a" if BR2_cortex_a8
default "armv7-a" if BR2_cortex_a9
default "armv7-a" if BR2_cortex_a15
default "armv4" if BR2_sa110
default "armv4" if BR2_sa1100
default "armv5te" if BR2_xscale

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@ -15,15 +15,15 @@ choice
bool "gcc 4.2.2-avr32-2.1.5"
config BR2_GCC_VERSION_4_3_X
depends on !BR2_avr32 && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8 && !BR2_cortex_a8 && !BR2_cortex_a9 && !BR2_x86_atom && !BR2_powerpc_e300c2 && !BR2_powerpc_e300c3 && !BR2_powerpc_e500mc && !BR2_powerpc_464 && !BR2_powerpc_464fp && !BR2_powerpc_476 && !BR2_powerpc_476fp
depends on !BR2_avr32 && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8 && !BR2_cortex_a5 && !BR2_cortex_a8 && !BR2_cortex_a9 && !BR2_cortex_a15 && !BR2_x86_atom && !BR2_powerpc_e300c2 && !BR2_powerpc_e300c3 && !BR2_powerpc_e500mc && !BR2_powerpc_464 && !BR2_powerpc_464fp && !BR2_powerpc_476 && !BR2_powerpc_476fp
bool "gcc 4.3.x"
config BR2_GCC_VERSION_4_4_X
depends on !BR2_avr32 && !BR2_x86_atom && !BR2_powerpc_476 && !BR2_powerpc_476fp
depends on !BR2_avr32 && !BR2_cortex_a5 && !BR2_cortex_a15 && !BR2_x86_atom && !BR2_powerpc_476 && !BR2_powerpc_476fp
bool "gcc 4.4.x"
config BR2_GCC_VERSION_4_5_X
depends on !BR2_avr32 && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8
depends on !BR2_avr32 && !BR2_cortex_a15 && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8
bool "gcc 4.5.x"
config BR2_GCC_VERSION_4_6_X