NetCube-Systems-Austria/kumquat-buildroot
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

arm: update processor types

Browse Source 
Update arm architecture variant: add the cortex A7.

Signed-off-by: Kelvin Cheung <keguang.zhang@gmail.com>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
This commit is contained in:
Kelvin Cheung 2013-06-09 10:53:50 +08:00 committed by Peter Korsgaard
parent 3874b0d978
commit 9d19151351
2 changed files with 9 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
arch/Config.in.arm
View File

@ -36,6 +36,9 @@ config BR2_arm1176jzf_s
config BR2_cortex_a5
bool "cortex-A5"
select BR2_ARM_CPU_MAYBE_HAS_NEON
config BR2_cortex_a7
bool "cortex-A7"
select BR2_ARM_CPU_HAS_NEON
config BR2_cortex_a8
bool "cortex-A8"
select BR2_ARM_CPU_HAS_NEON
@ -113,6 +116,7 @@ config BR2_GCC_TARGET_TUNE
default "arm1176jz-s" if BR2_arm1176jz_s
default "arm1176jzf-s" if BR2_arm1176jzf_s
default "cortex-a5" if BR2_cortex_a5
default "cortex-a7" if BR2_cortex_a7
default "cortex-a8" if BR2_cortex_a8
default "cortex-a9" if BR2_cortex_a9
default "cortex-a15" if BR2_cortex_a15
@ -134,6 +138,7 @@ config BR2_GCC_TARGET_ARCH
default "armv6zk" if BR2_arm1176jz_s
default "armv6zk" if BR2_arm1176jzf_s
default "armv7-a" if BR2_cortex_a5
default "armv7-a" if BR2_cortex_a7
default "armv7-a" if BR2_cortex_a8
default "armv7-a" if BR2_cortex_a9
default "armv7-a" if BR2_cortex_a15

8
toolchain/gcc/Config.in
View File

@ -23,20 +23,20 @@ choice
bool "gcc 4.2.2-avr32-2.1.5"
config BR2_GCC_VERSION_4_3_X
depends on !BR2_arc && !BR2_avr32 && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8 && !BR2_cortex_a5 && !BR2_cortex_a8 && !BR2_cortex_a9 && !BR2_cortex_a15 && !BR2_x86_atom && !BR2_powerpc_e300c2 && !BR2_powerpc_e300c3 && !BR2_powerpc_e500mc && !BR2_powerpc_464 && !BR2_powerpc_464fp && !BR2_powerpc_476 && !BR2_powerpc_476fp && !BR2_fa526 && !BR2_pj4
depends on !BR2_arc && !BR2_avr32 && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8 && !BR2_cortex_a5 && !BR2_cortex_a7 && !BR2_cortex_a8 && !BR2_cortex_a9 && !BR2_cortex_a15 && !BR2_x86_atom && !BR2_powerpc_e300c2 && !BR2_powerpc_e300c3 && !BR2_powerpc_e500mc && !BR2_powerpc_464 && !BR2_powerpc_464fp && !BR2_powerpc_476 && !BR2_powerpc_476fp && !BR2_fa526 && !BR2_pj4
bool "gcc 4.3.x"
config BR2_GCC_VERSION_4_4_X
depends on !BR2_arc && !BR2_avr32 && !BR2_cortex_a5 && !BR2_cortex_a15 && !BR2_x86_atom && !BR2_powerpc_476 && !BR2_powerpc_476fp && !BR2_fa526 && !BR2_pj4
depends on !BR2_arc && !BR2_avr32 && !BR2_cortex_a5 && !BR2_cortex_a7 && !BR2_cortex_a15 && !BR2_x86_atom && !BR2_powerpc_476 && !BR2_powerpc_476fp && !BR2_fa526 && !BR2_pj4
bool "gcc 4.4.x"
config BR2_GCC_VERSION_4_5_X
depends on !BR2_arc && !BR2_avr32 && !BR2_cortex_a15 && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8 && !BR2_fa526 && !BR2_pj4
depends on !BR2_arc && !BR2_avr32 && !BR2_cortex_a7 && !BR2_cortex_a15 && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8 && !BR2_fa526 && !BR2_pj4
select BR2_GCC_NEEDS_MPC
bool "gcc 4.5.x"
config BR2_GCC_VERSION_4_6_X
depends on !BR2_arc && !BR2_avr32 && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8 && !BR2_pj4
depends on !BR2_arc && !BR2_avr32 && !BR2_cortex_a7 && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8 && !BR2_pj4
select BR2_GCC_NEEDS_MPC
bool "gcc 4.6.x"