Commit Graph

224 Commits

Author SHA1 Message Date
Yann E. MORIN
4e99ab9bd7 arch/mips: always has atomic ops
Signed-off-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Anton Kolesov <Anton.Kolesov@synopsys.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-08-18 11:02:41 +02:00
Yann E. MORIN
85da209efb arch/microblaze: always has atomic ops
Signed-off-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Anton Kolesov <Anton.Kolesov@synopsys.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-08-18 11:02:31 +02:00
Yann E. MORIN
0d79bc13ec arch/m68k: always has atomic ops
Signed-off-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Anton Kolesov <Anton.Kolesov@synopsys.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-08-18 11:01:40 +02:00
Yann E. MORIN
5b98309f59 arch/bfin: always has atomic ops
Signed-off-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Anton Kolesov <Anton.Kolesov@synopsys.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-08-18 11:01:31 +02:00
Yann E. MORIN
116f63f4d7 arch/avr32: always has atomic ops
Signed-off-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Anton Kolesov <Anton.Kolesov@synopsys.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-08-18 11:01:22 +02:00
Yann E. MORIN
b8a8263858 arch/arm: always has atomic ops
armv6 and above all have one sort of atomic ops or another. For armv5
and below, they are emulated, either as a kernel trap, a kernel VDSO,
or compiler intrinsics.

Aarch64 is just armv8, so make it a single commit. ;-)

Signed-off-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Anton Kolesov <Anton.Kolesov@synopsys.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-08-18 11:00:51 +02:00
Yann E. MORIN
6172ceb3cf toolchain: drop the now-unused old BR2_TOOLCHAIN_HAS_ATOMIC_INTRINSICS
It's now been replaced with BR2_ARCH_HAS_ATOMICS, annd all packages have
been changed to use that instead.

Signed-off-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Cc: Anton Kolesov <Anton.Kolesov@synopsys.com>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-08-18 10:57:55 +02:00
Yann E. MORIN
1b5f0fc8df arch: add an option to specify if the arch has atomic ops
The fact that atomic operations are available is not really a
specificity of the toolchain, but rather of the architecture.

So, add a new option that architectures that have atomic operations
can select. This in turn selects the current toolchain atomic option,
until all packages have been converted, at which point the old
toolchain option can be removed.

Reported-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Cc: Anton Kolesov <Anton.Kolesov@synopsys.com>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-08-18 10:56:35 +02:00
Anton Kolesov
cbffd50561 toolchain: Add config option for atomic intrinsics
GCC has several builtin functions that implement atomic operations. Those
functions are architecture specific and may not be implemented by the
specific toolchain. In case of GCC for ARC those functions rely on
LLOCK/SCOND instructions which are optional in ARC CPU's. If ARC CPU doesn't
support those instructions but software tries to use them, then application
will be aborted with Illegal instruction exception. To avoid confusion user
should first specify that their CPU supports atomic extension, which will
allow selection of packages that use builtin atomic functions.

Signed-off-by: Anton Kolesov <Anton.Kolesov@synopsys.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2014-08-03 11:20:47 +02:00
Peter Korsgaard
c2444e94ce arch: avr32 should only get removed for the 2015.02 release
As discussed on the list.

Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-07-10 22:05:55 +02:00
Thomas Petazzoni
01efcf84fe arch: deprecate the AVR32 architecture
The AVR32 architecture from Atmel is obsolete since a long time, not
supported upstream in most of the toolchain components (requires a
special version of gcc, an old version of uClibc, etc.). Until
February, Simon Dawson was making an excellent job at maintaining
AVR32 in Buildroot, and fixing all the issues caused by this
architecture. However, Simon focus has changed, and despite his call
for a new maintainer for AVR32 in Buildroot, nobody stepped up.

The issue of maintaining AVR32 is becoming worse and worse, so this
patch proposes to deprecate it for 2014.08, but keeping the support
around, to remove it for sure in 2014.11.

Cc: Simon Dawson <spdawson@gmail.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Gustavo Zacarias <gustavo@zacarias.com.ar>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-07-10 16:49:36 +02:00
Cody P Schafer
7e674dfa4f powerpc: add powerpc64 and powerpc64le support
This enables powerpc64 and powerpc64le. Currently, le needs at least
glibc 2.19 and gcc 4.9.0. For gdb, 7.7.1 works (added in an earlier
patch).

[Peter: also disallow gcc 4.8 for ppc64le]
Signed-off-by: Cody P Schafer <cody@linux.vnet.ibm.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-05-26 21:48:33 +02:00
Cody P Schafer
32a471824b powerpc: remove unneeded dependencies
Signed-off-by: Cody P Schafer <cody@linux.vnet.ibm.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-05-26 21:22:09 +02:00
Cody P Schafer
71badded4b powerpc: add power{4,5,6,7,8} cpus
Signed-off-by: Cody P Schafer <cody@linux.vnet.ibm.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-05-26 21:18:10 +02:00
Cody P Schafer
32025e99dd powerpc: mark 32-bit only powerpc cpus to prep for adding powerpc64 support
Signed-off-by: Cody P Schafer <cody@linux.vnet.ibm.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-05-26 21:17:26 +02:00
Cody P Schafer
40e58dab0c powerpc: add BR2_POWERPC_CPU_HAS_ALTIVEC to replace adhoc deps/checks
Signed-off-by: Cody P Schafer <cody@linux.vnet.ibm.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-05-26 21:14:08 +02:00
Cody P Schafer
b4c824562b powerpc: add BR2_POWERPC_CPU_HAS_SPE to replace adhoc deps/checks
Signed-off-by: Cody P Schafer <cody@linux.vnet.ibm.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-05-26 14:28:59 +02:00
Jeff Bailey
a426a91973 Add support for powerpc64le
This patch adds support for powerpc64le-linux-gnu.  This includes
needed patches to fakeroot and gmp.

gmp patch is from upstream HG tree.
fakeroot patch is from Ubuntu written by Adam Conrad.

Signed-off-by: Jeff Bailey <jeffbailey@google.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-05-25 23:24:09 +02:00
Gustavo Zacarias
befab216a2 arch/arm: drop ARM(7TDMI/720T/740T) support
The toolchain currently doesn't build for nommu ARM and is in need of
serious work.
Problem is there are no emulation targets and real ARM(7TDMI/720T/740T)
hardware that's capable of running linux (enough memory, having a
memory controller...) is VERY rare and uses very old versions to
make it usable.

The ARM nommu focus should go into Cortex M series processors that are
obtainable at reasonable cost on modern hardware that has external
memory controllers.

Signed-off-by: Gustavo Zacarias <gustavo@zacarias.com.ar>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-05-08 16:53:49 +02:00
Bernd Kuhls
affb6a3853 arch: add support for "corei7" Intel CPU optimisations
gcc support was added in version 4.6:
http://gcc.gnu.org/gcc-4.6/changes.html

Signed-off-by: Bernd Kuhls <bernd.kuhls@t-online.de>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-05-03 03:39:29 +02:00
Gustavo Zacarias
a8b3db9d3e arm: update processor types
Update the arm processor types: add the cortex A12 variant supported by
gcc 4.9.x

Signed-off-by: Gustavo Zacarias <gustavo@zacarias.com.ar>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-04-24 13:45:32 +02:00
Vicente Olivert Riera
574fa145d8 Disable o32 ABI for MIPS64 architectures
Building o32 ELF files for MIPS64 is an exotic configuration that nobody
should be using. If o32 is required, then is better if it's built for
MIPS 32-bit cores so only 32-bit instructions will be used leading to a
more efficient o32 usage.

Signed-off-by: Vicente Olivert Riera <Vincent.Riera@imgtec.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-03-28 12:51:46 +01:00
Jan Drazil
c220581c78 Fix microblize little endian toolchain
Buildroot toolchain creates big endian binaries instead of little endian
ones for microblaze architecture. The reason is wrong BR2_ARCH string.
KERNEL_ARCH must contain microblaze in both cases.

Signed-off-by: Jan Drazil <xdrazi00@stud.fit.vutbr.cz>
Signed-off-by: Jan Viktorin <xvikto03@stud.fit.vutbr.cz>
Acked-by: Gustavo Zacarias <gustavo@zacarias.com.ar>
Tested-by: Gustavo Zacarias <gustavo@zacarias.com.ar>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-03-20 16:46:29 +01:00
Thomas Petazzoni
e543f5a104 arch: remove sh2, sh3 and sh3eb support
This patch removes the sh2, sh3 and sh3eb support, because the user
base is inexistent, and the Linux support for these architectures is
poor. The sh2a support is preserved, because at least one user
expressed interest in this architecture, and is actually using it:

  http://lists.busybox.net/pipermail/buildroot/2013-April/070399.html

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-02-05 12:05:58 +01:00
Thomas Petazzoni
dd712eb31c arch: remove incorrect condition for endian definition on SuperH
Probably due to some copy/paste mistake, Config.in.sh was defining
BR2_ENDIAN to "LITTLE" when the architecture is BR2_x86_64. Due to the
fact that Config.in.sh is never included when we are building for
x86_64, this is a no-op, but is certainly good to clean up.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-02-04 15:15:11 +01:00
Adrien Béraud
485f07dd4c arch: use BR2_X86_CPU_HAS_SSE4, SSE42 with jaguar
This follow-up commit adds support for SSE 4 and SSE 4.2 to
the jaguar architecture.

Signed-off-by: Adrien Béraud <adrien.beraud@savoirfairelinux.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-01-20 22:21:11 +01:00
Adrien Béraud
a20cb38659 arch: add support for "jaguar" AMD CPU optimisations
AMD Jaguar ( https://en.wikipedia.org/wiki/Jaguar_%28microarchitecture%29 ) is
suddenly a popular architecture since it is used in the PS4 and the XBox One.
Many embedded systems are also likely to use it in the next years.

This patch adds support for GCC architecture-specific optimisations and
tuning for these CPUs.
These optimizations are available with GCC 4.8+.

Signed-off-by: Adrien Beraud <adrien.beraud@savoirfairelinux.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-01-15 23:19:46 +01:00
Bernd Kuhls
0e8e3c2879 ffmpeg: Add sse4 related options BR2_X86_CPU_HAS_SSE4 / BR2_X86_CPU_HAS_SSE4
Signed-off-by: Bernd Kuhls <berndkuhls@hotmail.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-01-13 22:28:42 +01:00
Thomas De Schampheleire
ba4ad9d27c deprecated handling: introduce BR2_DEPRECATED_SINCE_xxxx_xx
In order to keep better track of when a feature got deprecated, and hence
when it can be removed, a new set of symbols BR2_DEPRECATED_SINCE_xxxx_xx is
introduced. These symbols are automatically selected when BR2_DEPRECATED is
selected, and thus are transparent to the user.
A deprecated feature will no longer depend on BR2_DEPRECATED directly, but
rather on the appropriate BR2_DEPRECATED_SINCE_xxxx_xx. If that symbol does
not yet exist, it has to be created in Config.in.
When removing a deprecated feature, one should also check whether this was
the last feature using the BR2_DEPRECATED_SINCE_xxxx_xx symbol, in which
case the latter can be removed from Config.in.

A followup patch will make sure the overview is added to the list of
deprecated features in the manual, so that a buildroot core developer can
easily determine which features to remove in a given development cycle.

Signed-off-by: Thomas De Schampheleire <thomas.de.schampheleire@gmail.com>
Acked-by: Arnout Vandecappelle (Essensium/Mind) <arnout@mind.be>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-01-10 15:03:53 +01:00
Vicente Olivert Riera
b10a40535d Disable MIPS64 ISAs for MIPS32 targets
Currently you can select MIPS64 ISAs, like mips64 and mips64r2, for
MIPS32 targets. This is incorrect, so we disable the possibility to do
that.

Reviewed-by: Markos Chandras <markos.chandras@imgtec.com>
Signed-off-by: Vicente Olivert Riera <vincent.riera@imgtec.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2014-01-03 20:43:25 +01:00
Thomas Petazzoni
d3539dd53b arch: pass cpu option instead of tune option on ARM
Currently, the ARM Config.in logic specifies values for
--with-arch/-march and --with-tune/-mtune, but not for
--with-cpu/-mcpu. However, this causes problems on ARMv4, because
specifying --with-arch=armv4t isn't enough to make gcc generate ARMv4
code: one should also pass --with-cpu=<some ARMv4 CPU>.

Moreover, since Buildroot is generally designed to generate code
specifically for the configured target, it makes sense to give our own
--with-cpu/-mcpu value instead of relying on the default value used by
gcc, and only do small optimizations with -mtune.

Reported-by: Adam Hussein <kryme76@yahoo.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
2013-12-26 23:19:04 +01:00
Mischa Jonker
26cc49f6c6 Revert "arc: Add option for ARC-specific download site"
All packages use github now.

This reverts commit 1445b7fd2e.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2013-12-06 22:45:13 +01:00
Peter Korsgaard
50ce7ffb76 Merge branch 'next'
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2013-12-01 20:32:00 +01:00
Gustavo Zacarias
8aaede24c4 arch/sparc: drop unused variants
Drop stale v9/ultrasparc/niagara variants.

Signed-off-by: Gustavo Zacarias <gustavo@zacarias.com.ar>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2013-11-28 15:18:29 +01:00
Vicente Olivert Riera
831dad2d61 Mark MIPS I, II, III and IV as deprecated
Deprecate old MIPS ISAs since they are rarely used anymore and they cause
multiple build problems for new packages

Signed-off-by: Vicente Olivert Riera <Vincent.Riera@imgtec.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2013-11-20 13:44:27 +01:00
Simon Dawson
d7ec9463e2 avr32: pass target arch to gcc
As suggested by Alexander Lukichev and Thomas Petazzoni on the mailing list,
only one of the two avr32 microarchitectures is relevant for Buildroot:
avr32 Linux implies the avr32b microarchitecure, as used in the ap7000.

Signed-off-by: Simon Dawson <spdawson@gmail.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2013-11-06 22:37:42 +01:00
Gustavo Zacarias
957a986214 arch/Config.in: introduce BR2_KERNEL_64_USERLAND_32 symbol
On some architectures one can be running a 64-bit kernel with a 32-bit
userland. Such is the case for sparc64 (unsupported) for example and
mips64 with n32 ABI.

Some tools that interface directly with the kernel need to be built
specially for this, so introduce this symbol to tweak their build in
one central kludge to be future-proof.

Example: bug #6602.

Signed-off-by: Gustavo Zacarias <gustavo@zacarias.com.ar>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2013-10-30 22:59:03 +01:00
Markos Chandras
f60dafe068 arch/mips: Set BR2_GCC_TARGET_ARCH for MIPS
Set --with-arch instead of --with-tune for MIPS so that the
generated code will be optimal for the given MIPS ISA.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2013-10-30 18:44:12 +01:00
Yann E. MORIN
2b5650cf7f targets: move target options to their own sub-menu
Currently, all target options lie in the top-level menu.
This looks a bit clumsy, since all other options are neatly
folded into their own sematic sub-menus each.

Move the target option into their own sub-menu too.

Signed-off-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Acked-by: Thomas De Schampheleire <thomas.de.schampheleire@gmail.com>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2013-09-05 15:45:24 +02:00
Ezequiel Garcia
830205c036 nios2: Add new architecture
This commit adds very basic support to build for the Nios II
architecture. Toolchain support is still missing and instead
we need to use an external custom toolchain.

Notice that this architecture had been previously removed in
Buildroot 2010.05-rc1 release (as explained in the CHANGES file)
and this commit adds it back.

Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2013-09-02 21:38:45 +02:00
Gustavo Zacarias
79310d3275 arch/arm: add support for thumb(1) mode
[Peter: also adjust BR2_GCC_TARGET_MODE]
Signed-off-by: Gustavo Zacarias <gustavo@zacarias.com.ar>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2013-07-18 00:25:07 +02:00
Thomas Petazzoni
8316801f34 arch/arm: update VFPv2 comment to mention ARMv5
Commit 6b3a0417c4 ('arch/arm: arm926 may have VFP') forgot to update
the help text of the VFPv2 option to mention ARMv5. This commit fixes
that.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2013-07-18 00:25:06 +02:00
Gustavo Zacarias
6b3a0417c4 arch/arm: arm926 may have VFP
The VFP9-S FPU (VFPv2) is optional for ARM926EJ-S, see:
http://www.arm.com/products/processors/classic/arm9/arm926.php?tab=Specifications+
Real silicon:
http://www.nxp.com/documents/data_sheet/LPC3180.pdf

Signed-off-by: Gustavo Zacarias <gustavo@zacarias.com.ar>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2013-07-17 07:29:27 +02:00
Thomas Petazzoni
8211ee3c59 arch: use tabs instead of spaces in Config.in files
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2013-07-16 15:32:31 +02:00
Thomas Petazzoni
85d0769ac5 arch/arm: add support for Thumb2
Until now, we were using the default ARM instruction set, as used by
the toolchain: the 32 bits ARM instruction set for the internal
backend, and for external toolchain, whatever default was chosen when
the toolchain was generated.

This commit adds support for the Thumb2 instruction set. To do so, it:

 * provides a menuconfig choice between ARM and Thumb2. The choice is
   only shown when Thumb2 is supported, i.e on ARMv7-A CPUs.

 * passes the --with-mode={arm,thumb} option when building gcc in the
   internal backend. This tells the compiler which type of
   instructions it should generate.

 * passes the m{arm,thumb} option in the external toolchain
   wrapper. ARM and Thumb2 code can freely be mixed together, so the
   fact that the C library has been built either ARM or Thumb2 and
   that the rest of the code is built Thumb2 or ARM is not a problem.

[Peter: fix empty BR2_GCC_TARGET_MODE check]
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2013-07-16 15:28:03 +02:00
Thomas Petazzoni
5f959a1c61 arch: improve ARM floating point support and add support for EABIhf
This commit introduces the support for the EABIhf ABI, next to the
existing support we have for EABI and OABI (even though OABI support
is deprecated). EABIhf allows to improve performance of floating point
workload by using floating point registers to transfer floating point
arguments when calling functions, instead of using integer registers
to do, as is done in the 'softfp' floating point model of EABI.

In addition to this, this commit introduces a list of options for the
floating point support:
 * Software floating point
 * VFP
 * VFPv3
 * VFPv3-D16
 * VFPv4
 * VFPv4-D16

and it introduces some logic to make sure the options are only visible
when it makes sense, depending on the ARM core being selected. This is
however made complicated by the fact that certain VFP capabilities are
mandatory on some cores, but optional on some other cores. The kconfig
logic tries to achieve the following goals:

 * Hide options that are definitely not possible.

 * Use safe default values (i.e for Cortex-A5 and A7, the presence of
   the VFPv4 unit is optional, so we default on software floating
   point on these cores)..

 * Show the available possibilities, even if some of them are not
   necessarily working on a particular core (again, for the Cortex-A5
   and A7 cores, there is no way of knowing whether the particular
   variant used by the user has VFPv4 or not, so we select software
   floating point by default, but still show VFP/VFPv3/VFPv4 options).

It is worth noting that this commit doesn't add support for all
possible -mfpu= values on ARM. We haven't added support for fpa, fpe2,
fpe3, maverick (those four are only used on very old ARM cores), for
vfpv3-fp16, vfpv3-d16-fp16, vfpv3xd, vfpv3xd-fp16, neon-fp16,
vfpv4-sp-d16. They can be added quite easily if needed thanks to the
new organization of the Config.in options.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2013-07-16 14:42:12 +02:00
Thomas Petazzoni
9b3e72b4fd arch: Refactor BR2_SOFT_FLOAT into per-architecture options
As we are going to introduced a more advanced support of floating
point options for the ARM architecture, we need to adjust how the
soft-float option is handled. We replace the current hidden option
BR2_PREFER_SOFT_FLOAT option and the visible BR2_SOFT_FLOAT option by:

 * A global hidden BR2_SOFT_FLOAT option, defined in arch/Config.in,
   that tells whether the architecture-specific code is using software
   emulated floating point. This hidden option can be used throughout
   Buildroot to determine whether soft float is used or not.

 * Per-architecture visible BR2_<arch>_SOFT_FLOAT options, for the
   architecture for which it makes sense, which allows users to select
   soft float emulation when needed.

This change will allow each architecture to have a different way of
presenting its floating point capabilities.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2013-07-16 14:35:07 +02:00
Thomas Petazzoni
d774551787 arch: introduce BR2_GCC_TARGET_{FPU, FLOAT_ABI}
Buildroot already has the BR2_GCC_TARGET_{TUNE,ARCH,ABI,CPU} hidden
kconfig strings that allow per-architecture Config.in files to feed
the appropriate values of --with-{tune,arch,abi-cpu} when building
gcc, or the appropriate flags for the external toolchain wrapper.

This commit has two additional options:
BR2_GCC_TARGET_{FPU,FLOAT_ABI}, that allows to define the
--with-{fpu,float} gcc configure options for the internal backend, or
the -m{fpu,float-abi} options for the flags of the external toolchain
wrapper.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2013-07-16 13:44:00 +02:00
Yann E. MORIN
de1b4f99ae arch/arm: remove setting gcc's apcs-gnu ABI (aka OABI)
Signed-off-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2013-07-14 22:11:32 +02:00
Yann E. MORIN
adf9646229 arch/arm: remove OABI option
OABI is more than legacy, it's dead.

New developments should go with EABI, since it so much better.
>From the Debian EABI page [0] :
  - floating point performance, with or without an FPU is very much faster
  - mixing soft and hardfloat code is possible
  - structure packing is not as painful as it used to be
  - a more efficient syscall convention
  - more compatibility with various tools

[0] http://wiki.debian.org/ArmEabiPort

[Thomas: keep the ABI choice, as we are going to introduce EABIhf later].
Signed-off-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2013-07-14 22:09:45 +02:00
Kelvin Cheung
9d19151351 arm: update processor types
Update arm architecture variant: add the cortex A7.

Signed-off-by: Kelvin Cheung <keguang.zhang@gmail.com>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2013-06-16 21:12:36 +02:00
Sonic Zhang
57c0543291 arch: toolchain: Introduce binary format FLAT types.
Just introduce the symbol and options in arch generic Config.in.
Add FLAT types specific compiling flags into package makefile.

Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2013-05-05 22:54:37 +02:00
Sonic Zhang
66d41890ec arch: toolchain: Introduce target CPU revision.
Adds the possibility to have a free-form CPU revision string and append it
to the target CPU. Only Blackfin actually uses this option.

Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2013-05-05 22:49:50 +02:00
Sonic Zhang
371e6dc780 arch: Add blackfin CPU choice
This patch adds a Target CPU configuration option and uses it to select
a -m option for gcc.

Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2013-05-05 22:48:47 +02:00
Sonic Zhang
57133825c9 arch: toolchain: Introduce binary formats BINFMT_*.
Just introduce the symbol and options in arch generic Config.in.
Append FLAT format link flags to external toolchain wrapper.

Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2013-05-05 22:46:37 +02:00
Mischa Jonker
1445b7fd2e arc: Add option for ARC-specific download site
As ARC support is not yet in all upstream packages, a different location is
required to download the packages from. This adds an option to specify a
site for ARC-specific versions of packages such as binutils, gcc.

When ARC support has been upstreamed for all packages, this option can be
removed again.

Signed-off-by: Mischa Jonker <mjonker@synopsys.com>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2013-05-04 23:03:38 +02:00
Mischa Jonker
14f48861b5 arc: Add ARC and ARC BE architecture
Synopsys' DesignWare ARC Processor Cores are a family of 32-bit CPUs that
can be used from deeply embedded to high performance host applications.

Signed-off-by: Mischa Jonker <mjonker@synopsys.com>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2013-05-04 22:58:46 +02:00
Gustavo Zacarias
8f434ff274 toolchain/arm: add support for Marvell PJ4
Signed-off-by: Gustavo Zacarias <gustavo@zacarias.com.ar>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2013-04-29 22:22:49 +02:00
Gustavo Zacarias
9474421da3 toolchain/arm: drop generic and old, add fa526/626, unify strongarm
* Add Faraday FA526/626 as suggested on bug #1291
Note however that these cores are v4 and NOT v4t.

* Make the sa110 & sa1110 cores -> strongarm since they're the same.

* Drop all of the ARM variants lower than v4 including generic, there's
no point in supporting obsolete targets.

* Fix uClibc USE_BX logic, it was always on, this would break the new
FA526/626 support and broke StrongARM since it's a v4 core.

Signed-off-by: Gustavo Zacarias <gustavo@zacarias.com.ar>
Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2013-04-11 09:22:48 +02:00
Thomas Petazzoni
8e7b4ae8d2 Mark AArch64 as a 64 bits architecture
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2013-03-18 16:58:21 +01:00
Yann E. MORIN
58c2500e2a arch/arm: fix-up the ARM Kconfig warning
Kconfig does not accepts that a symbol that is part of a choice
be affected a default value.

Fix this by introducing a dummy EABI symbol, and make the real
EABI symbol a prompt-less option that depends on !OABI.

[Peter: drop arm dependency, rename to EABI_CHOICE]
Signed-off-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Cc: Peter Korsgaard <jacmet@uclibc.org>
Cc: Arnout Vandecappelle <arnout@mind.be>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2013-02-07 20:39:26 +01:00
Arnout Vandecappelle (Essensium/Mind)
c4cfa85b79 arm: deprecate OABI
The BR2_ARM_EABI config symbol is still kept in order to minimize
the impact.

Signed-off-by: Arnout Vandecappelle (Essensium/Mind) <arnout@mind.be>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2013-02-07 08:44:05 +01:00
Benoît Thébaudeau
88cf3bb917 arch/Config.in.arm: Use armv6k for arm1136jf-s rev1
According to the ARM1136JF-S and ARM1136J-S Revision r1p5 Technical Reference
Manual, from release rev1 (r1pn), the ARM1136JF-S processor implements the ARMv6
instruction set with the ARMv6k additions.

This patch differentiates the ARM1136JF-S revisions 0 and 1 in order to use
either ARMv6j (e.g. on Freescale i.MX31) or ARMv6k (e.g. on Freescale i.MX35).

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2013-02-02 08:28:22 +01:00
Gustavo Zacarias
16bcf46a63 arch/sparc: drop old SUN-specific variants
Drop the old Sun-specific variants used in old workstations (pre-1997)
and other useless ones.

The V7 ISA is a very old cpu only used in the first Sun workstations,
the toolchain support is broken: the cpu doesn't do hardware div and
it's not handled elsewhere.

The sparclite is also a very old Fujitsu cpu only used in early 90s Sun
machines (includes f930 & f934).

The sparclet (tsc701) was a microcontroller-variant.

The supersparc and hypersparc are just V8 variants also used in old Sun
workstations/servers.

Signed-off-by: Gustavo Zacarias <gustavo@zacarias.com.ar>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2013-01-02 14:59:55 +01:00
Richard Braun
2a27ad3d79 arch: fix BR2_ARCH for generic target variant
Signed-off-by: Richard Braun <rbraun@sceen.net>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2012-12-20 15:15:24 +01:00
Peter Korsgaard
f9da98c85d arch/Config.in.arm: Add BR2_ARM_CPU_HAS_NEON similar to how mmx/sse is handled on x86
NEON support is optional on A5/A9, so let the user choose if SoC has it /
wants to use it.

Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2012-12-13 23:25:53 +01:00
Gustavo Zacarias
10d042ad34 arm: update processor types
Update the arm processor types: add the cortex A5 & A15 variants.

Signed-off-by: Gustavo Zacarias <gustavo@zacarias.com.ar>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2012-12-09 23:07:11 +01:00
Gustavo Zacarias
1291304d7e powerpc: update processor types
Update the powerpc processor types.
Remove the 801, it's the original IBM experimental implementation.
Add the 464, 464fp, 476 and 476fp cores.

Signed-off-by: Gustavo Zacarias <gustavo@zacarias.com.ar>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2012-12-09 23:07:03 +01:00
Chris Zankel
fdd5bc948e xtensa: use uppercase for configurations and modified overlay structure
Except for architecture and processor names, buildroot uses capitalized
configuration names, so change the macro names for xtensa to follow that
standard.
Change the overlay file to have a subdirectory for each component
(gdb, binutils, gcc, etc.) to make it more future-prove.

Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2012-11-21 11:08:50 +01:00
Thomas Petazzoni
171075ed4f arch: Config.in string configuration options must be quoted
Suggested by Yann E. Morin.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Reported-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Acked-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2012-11-15 16:39:51 +01:00
Chris Zankel
d8792a04ca xtensa: support configurable processor configurations
Xtensa is a configurable processor architecture, which allows to define
additional instructions and registers. The required variant specific
information for the toolchain is delivered in an 'overlay' file, which
needs to be 'untarred' to the corresponding directories after the
source is installed and patched.
This patch provides support for binutils, gcc, and gdb with a very
limited changes to the build scripts. These additions are only executed
for the Xtensa architecture and have no effect on other architectures.

[Thomas: rebased on top of the 'arch: improve definition of gcc mtune,
mcpu, etc.' patch, and changed 'Target ABI' to 'Target Architecture
Variant'].

Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2012-11-15 16:39:48 +01:00
Chris Zankel
75720db391 xtensa: add support for the Xtensa architecture
The Xtensa architecture had been removed because it required special
handling and depended on additional directories and files that became
obsolete over time. This change is more aligned to other architectures.

[Thomas: rebased on top of the "arch: improve definition of gcc mtune,
mcpu, etc." patch].

Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2012-11-15 16:39:43 +01:00
Thomas Petazzoni
44c04a2b4a arch: improve definition of gcc mtune, mcpu, etc.
As suggested by Yann E. Morin, there is a better way than our current
big Config.in.common to define the gcc mtune, mcpu, march,
etc. values. We can split the setting of those values in each
architecture file, which makes a lot more sense.

Therefore, the Config.in file now creates empty kconfig variables
BR2_ARCH, BR2_ENDIAN, BR2_GCC_TARGET_TUNE, BR2_GCC_TARGET_ARCH,
BR2_GCC_TARGET_ABI and BR2_GCC_TARGET_CPU. The values of those
variables are set by the individual Config.in.<arch> files. This is
possible because such files are now only conditionally included
depending on the top-level architecture that has been selected.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2012-11-15 16:12:46 +01:00
Thomas Petazzoni
79ee3c1f84 Split target/Config.in.arch into multiple Config.in.* in arch/
target/Config.in.arch had become too long, and we want to remove the
target/ directory. So let's move it to arch/ and split it this way:

 * An initial Config.in that lists the top-level architecture, and
   sources the arch-specific Config.in.<arch> files, as well as
   Config.in.common (see below)

 * One Config.in.<arch> per architecture, listing the CPU families,
   ABI choices, etc.

 * One Config.in.common that defines the gcc mtune, march, mcpu values
   and other hidden options.

[Peter: space->tab fix, mipsel64 little endian, mips3 as noted by Arnout]
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2012-11-04 12:51:38 +01:00