Tianrui Wei 4d70454754 arch/riscv: enable RISC-V Toolchain with Vector Extension ... This commits adds support for building a RISC-V toolchain with the vector extension, available since gcc 12. Signed-off-by: Tianrui Wei <tianrui@tianruiwei.com> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>		2023-07-23 12:08:54 +02:00
..
arch.mk	arch: set ld's common-page-size explicitly	2022-08-23 23:51:48 +02:00
arch.mk.arc	arch: set ld's common-page-size explicitly	2022-08-23 23:51:48 +02:00
arch.mk.riscv	arch/riscv: enable RISC-V Toolchain with Vector Extension	2023-07-23 12:08:54 +02:00
arch.mk.xtensa	arch/arch.mk.xtensa: relax check on overlay file to apply only to internal toolchains	2022-11-13 22:32:31 +01:00
Config.in	arch/csky: drop architecture	2022-07-27 16:58:59 +02:00
Config.in.arc
Config.in.arm	arch/Config.in.arm: drop support for iwmmxt architecture variant	2022-09-25 14:06:08 +02:00
Config.in.m68k	arch: rework MMU option handling and move to "Target architecture" menu	2022-07-27 11:38:07 +02:00
Config.in.microblaze
Config.in.mips
Config.in.nios2
Config.in.or1k
Config.in.powerpc	arch/Config.in.powerpc: change conditions to positive logic	2022-09-18 14:42:08 +02:00
Config.in.riscv	arch/riscv: enable RISC-V Toolchain with Vector Extension	2023-07-23 12:08:54 +02:00
Config.in.s390x
Config.in.sh
Config.in.sparc
Config.in.x86
Config.in.xtensa	arch: rework MMU option handling and move to "Target architecture" menu	2022-07-27 11:38:07 +02:00