22e476d788
Sync the Intel and AMD CPU target list with GCC 13. Multiple references are used for flags and synonyms [0] [1] [2] [3]. For Intel: Add Ivy Bridge, Sierra Forest, Grand Ridge, Knights Landing, Knights Mill, Granite Rapids, and Granite Rapids-D. The Sapphire Rapids CPU target supports Emerald Rapids. The Alder Lake CPU target supports Raptor Lake and Meteor Lake. Note: Knights Landing/Mills are based on Xeon Phi and do support some AVX512 extensions, but not the full subset required by BR2_X86_CPU_HAS_AVX512 For AMD: Add Bobcat, Bulldozer, Piledriver, Excavator, and Zen 1-4. Add a comment to BR2_X86_CPU_HAS_AVX512 to explain the expected extensions supported by the CPU. This flag was first selected by skylake-avx512 and encompasses what appears to be a standard subset across CPUs [3] and chapter 3 of the x86-64 psABI [4]: AVX512F, AVX512BW, AVX512CD, AVX512DQ, AVX512VL CPUs selecting this flag should, at a minimum, support this subset of AVX512 extensions. [0]: https://gcc.gnu.org/onlinedocs/gcc-13.2.0/gcc/x86-Options.html [1]: https://gcc.gnu.org/git/?p=gcc.git;a=blob_plain;f=gcc/config/i386/i386.h;hb=refs/tags/releases/gcc-13.2.0 [2]: https://gcc.gnu.org/git/?p=gcc.git;a=blob_plain;f=gcc/common/config/i386/i386-common.cc;hb=refs/tags/releases/gcc-13.2.0 [3]: https://en.wikipedia.org/wiki/AVX-512#CPUs_with_AVX-512 [4]: https://gitlab.com/x86-psABIs/x86-64-ABI/-/raw/master/x86-64-ABI/low-level-sys-info.tex Signed-off-by: Vincent Fazio <vfazio@gmail.com> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> |
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arch.mk | ||
arch.mk.arc | ||
arch.mk.riscv | ||
arch.mk.xtensa | ||
Config.in | ||
Config.in.arc | ||
Config.in.arm | ||
Config.in.m68k | ||
Config.in.microblaze | ||
Config.in.mips | ||
Config.in.nios2 | ||
Config.in.or1k | ||
Config.in.powerpc | ||
Config.in.riscv | ||
Config.in.s390x | ||
Config.in.sh | ||
Config.in.sparc | ||
Config.in.x86 | ||
Config.in.xtensa |