e5b3fa3ae4
m6201 is the -march option for GCC, but the real core name is M6250. Signed-off-by: Vicente Olivert Riera <Vincent.Riera@imgtec.com> Reviewed-by: Arnout Vandecappelle (Essensium/Mind) <arnout@mind.be> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
164 lines
4.1 KiB
Plaintext
164 lines
4.1 KiB
Plaintext
# mips default CPU ISAs
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config BR2_MIPS_CPU_MIPS32
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bool
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config BR2_MIPS_CPU_MIPS32R2
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bool
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config BR2_MIPS_CPU_MIPS32R5
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bool
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config BR2_MIPS_CPU_MIPS32R6
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bool
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config BR2_MIPS_CPU_MIPS64
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bool
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config BR2_MIPS_CPU_MIPS64R2
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bool
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config BR2_MIPS_CPU_MIPS64R5
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bool
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config BR2_MIPS_CPU_MIPS64R6
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bool
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choice
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prompt "Target Architecture Variant"
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depends on BR2_mips || BR2_mipsel || BR2_mips64 || BR2_mips64el
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default BR2_mips_32 if BR2_mips || BR2_mipsel
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default BR2_mips_64 if BR2_mips64 || BR2_mips64el
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help
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Specific CPU variant to use
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64bit cabable: 64, 64r2, 64r5, 64r6
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non-64bit capable: 32, 32r2, 32r5, 32r6
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config BR2_mips_32
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bool "Generic MIPS32"
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depends on !BR2_ARCH_IS_64
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select BR2_MIPS_CPU_MIPS32
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config BR2_mips_32r2
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bool "Generic MIPS32R2"
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depends on !BR2_ARCH_IS_64
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select BR2_MIPS_CPU_MIPS32R2
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config BR2_mips_32r5
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bool "Generic MIPS32R5"
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depends on !BR2_ARCH_IS_64
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select BR2_MIPS_CPU_MIPS32R5
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config BR2_mips_32r6
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bool "Generic MIPS32R6"
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depends on !BR2_ARCH_IS_64
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select BR2_MIPS_CPU_MIPS32R6
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config BR2_mips_interaptiv
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bool "interAptiv"
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depends on !BR2_ARCH_IS_64
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select BR2_MIPS_CPU_MIPS32R2
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config BR2_mips_m5150
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bool "M5150"
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depends on !BR2_ARCH_IS_64
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select BR2_MIPS_CPU_MIPS32R5
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config BR2_mips_m6250
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bool "M6250"
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depends on !BR2_ARCH_IS_64
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select BR2_MIPS_CPU_MIPS32R6
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config BR2_mips_p5600
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bool "P5600"
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depends on !BR2_ARCH_IS_64
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select BR2_MIPS_CPU_MIPS32R5
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config BR2_mips_xburst
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bool "XBurst"
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depends on !BR2_ARCH_IS_64
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select BR2_MIPS_CPU_MIPS32R2
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help
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The Ingenic XBurst is a MIPS32R2 microprocessor. It has a
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bug in the FPU that can generate incorrect results in
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certain cases. The problem shows up when you have several
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fused madd instructions in sequence with dependant
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operands. This requires the -mno-fused-madd compiler option
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to be used in order to prevent emitting these instructions.
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See http://www.ingenic.com/en/?xburst.html
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config BR2_mips_64
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bool "Generic MIPS64"
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depends on BR2_ARCH_IS_64
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select BR2_MIPS_CPU_MIPS64
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config BR2_mips_64r2
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bool "Generic MIPS64R2"
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depends on BR2_ARCH_IS_64
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select BR2_MIPS_CPU_MIPS64R2
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config BR2_mips_64r5
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bool "Generic MIPS64R5"
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depends on BR2_ARCH_IS_64
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select BR2_MIPS_CPU_MIPS64R5
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config BR2_mips_64r6
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bool "Generic MIPS64R6"
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depends on BR2_ARCH_IS_64
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select BR2_MIPS_CPU_MIPS64R6
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config BR2_mips_i6400
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bool "I6400"
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depends on BR2_ARCH_IS_64
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select BR2_MIPS_CPU_MIPS64R6
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config BR2_mips_p6600
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bool "P6600"
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depends on BR2_ARCH_IS_64
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select BR2_MIPS_CPU_MIPS64R6
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endchoice
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choice
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prompt "Target ABI"
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depends on BR2_mips64 || BR2_mips64el
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default BR2_MIPS_NABI32
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help
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Application Binary Interface to use
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config BR2_MIPS_NABI32
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bool "n32"
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depends on BR2_ARCH_IS_64
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select BR2_KERNEL_64_USERLAND_32
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config BR2_MIPS_NABI64
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bool "n64"
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depends on BR2_ARCH_IS_64
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endchoice
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config BR2_MIPS_SOFT_FLOAT
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bool "Use soft-float"
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default y
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select BR2_SOFT_FLOAT
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help
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If your target CPU does not have a Floating Point Unit (FPU)
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or a kernel FPU emulator, but you still wish to support
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floating point functions, then everything will need to be
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compiled with soft floating point support (-msoft-float).
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config BR2_ARCH
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default "mips" if BR2_mips
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default "mipsel" if BR2_mipsel
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default "mips64" if BR2_mips64
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default "mips64el" if BR2_mips64el
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config BR2_ENDIAN
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default "LITTLE" if BR2_mipsel || BR2_mips64el
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default "BIG" if BR2_mips || BR2_mips64
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config BR2_GCC_TARGET_ARCH
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default "mips32" if BR2_mips_32
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default "mips32r2" if BR2_mips_32r2
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default "mips32r5" if BR2_mips_32r5
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default "mips32r6" if BR2_mips_32r6
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default "interaptiv" if BR2_mips_interaptiv
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default "m5101" if BR2_mips_m5150
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default "m6201" if BR2_mips_m6250
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default "p5600" if BR2_mips_p5600
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default "mips32r2" if BR2_mips_xburst
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default "mips64" if BR2_mips_64
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default "mips64r2" if BR2_mips_64r2
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default "mips64r5" if BR2_mips_64r5
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default "mips64r6" if BR2_mips_64r6
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default "i6400" if BR2_mips_i6400
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default "p6600" if BR2_mips_p6600
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config BR2_MIPS_OABI32
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bool
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default y if BR2_mips || BR2_mipsel
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config BR2_GCC_TARGET_ABI
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default "32" if BR2_MIPS_OABI32
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default "n32" if BR2_MIPS_NABI32
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default "64" if BR2_MIPS_NABI64
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