54c8189105
The uCP1020 product family (ucp1020) is an Arcturus Networks Inc. System on Modules product featuring a Freescale P1020 CPU, optionally populated with 1 or 2 Gig-Ethernet PHYs, DDR3, NOR Flash, eMMC NAND Flash and/or SPI Flash. Signed-off-by: Oleksandr G Zhadan <oleks@arcturusnetworks.com> Signed-off-by: Michael Durrant <mdurrant@arcturusnetworks.com> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
29 lines
971 B
Diff
29 lines
971 B
Diff
From 4c74fd1266287deca0c1ff091071c5b8558b9735 Mon Sep 17 00:00:00 2001
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From: Oleksandr G Zhadan <oleks@arcturusnetworks.com>
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Date: Mon, 18 Jul 2016 10:45:41 -0400
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Subject: [PATCH 1/1] p1020 esdhc controller reserved bit
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Prevent SDHCI core from writing reserved bits, where
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p1020 reserved bit is SDHCI_CTRL_HISPD, not 0x01(SDHCI_CTRL_LED).
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Signed-off-by: Oleksandr G Zhadan <oleks@arcturusnetworks.com>
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Signed-off-by: Michael Durrant <arcsupport@arcturusnetworks.com>
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---
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drivers/mmc/host/sdhci-esdhc.h | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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diff --git a/drivers/mmc/host/sdhci-esdhc.h b/drivers/mmc/host/sdhci-esdhc.h
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index a870c42..b45de0a 100644
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--- a/drivers/mmc/host/sdhci-esdhc.h
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+++ b/drivers/mmc/host/sdhci-esdhc.h
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@@ -45,6 +45,6 @@
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#define ESDHC_DMA_SYSCTL 0x40c
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#define ESDHC_DMA_SNOOP 0x00000040
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-#define ESDHC_HOST_CONTROL_RES 0x01
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+#define ESDHC_HOST_CONTROL_RES (SDHCI_CTRL_HISPD)
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#endif /* _DRIVERS_MMC_SDHCI_ESDHC_H */
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--
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2.1.4
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