ae99fa6d64
This enables a riscv32 system to be built with a Buildroot generated toolchain (gcc >= 7.x, binutils >= 2.30, glibc only). This requires a custom version of glibc 2.26 from the riscv-glibc repository. Note that there are no tags in this repository, so the glibc version just consists of the 40 character commit id string. Thanks to Fabrice Bellard for pointing me towards the 32-bit glibc repository and for providing the necessary patch to get it to build. Signed-off-by: Mark Corbin <mark.corbin@embecosm.com> Reviewed-by: Matt Weber <matthew.weber@rockwellcollins.com> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
31 lines
590 B
Plaintext
31 lines
590 B
Plaintext
#
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# Configure the GCC_TARGET_ARCH variable and append the
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# appropriate RISC-V ISA extensions.
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#
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ifeq ($(BR2_riscv),y)
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ifeq ($(BR2_RISCV_64),y)
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GCC_TARGET_ARCH := rv64i
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else
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GCC_TARGET_ARCH := rv32i
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endif
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ifeq ($(BR2_RISCV_ISA_RVM),y)
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GCC_TARGET_ARCH := $(GCC_TARGET_ARCH)m
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endif
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ifeq ($(BR2_RISCV_ISA_RVA),y)
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GCC_TARGET_ARCH := $(GCC_TARGET_ARCH)a
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endif
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ifeq ($(BR2_RISCV_ISA_RVF),y)
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GCC_TARGET_ARCH := $(GCC_TARGET_ARCH)f
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endif
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ifeq ($(BR2_RISCV_ISA_RVD),y)
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GCC_TARGET_ARCH := $(GCC_TARGET_ARCH)d
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endif
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ifeq ($(BR2_RISCV_ISA_RVC),y)
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GCC_TARGET_ARCH := $(GCC_TARGET_ARCH)c
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endif
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endif
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