81fed0c7db
This patch introduces a recently released significant update to ARC HS family: ARC HS48. One of the major ARC HS48 features is dual-issue pipeline which requires a little bit modified instruction scheduling compared to single-issue cores (HS38), thus new "-mcpu/--with-cpu=hs4x". Also to address some peculiarities of early designs based on HS48 we introduced yet another "-mcpu/--with-cpu=hs4x_rel31" which we're going to use as well on some of our development boards. Signed-off-by: Evgeniy Didin <didin@synopsys.com> Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Cc: arc-buildroot@synopsys.com [Peter: fixup check-package warnings] Signed-off-by: Peter Korsgaard <peter@korsgaard.com> |
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| .. | ||
| arch.mk | ||
| arch.mk.arc | ||
| arch.mk.csky | ||
| arch.mk.riscv | ||
| arch.mk.xtensa | ||
| Config.in | ||
| Config.in.arc | ||
| Config.in.arm | ||
| Config.in.csky | ||
| Config.in.m68k | ||
| Config.in.microblaze | ||
| Config.in.mips | ||
| Config.in.nds32 | ||
| Config.in.nios2 | ||
| Config.in.or1k | ||
| Config.in.powerpc | ||
| Config.in.riscv | ||
| Config.in.sh | ||
| Config.in.sparc | ||
| Config.in.x86 | ||
| Config.in.xtensa | ||