4fabcd28ca
For more info, please read board/telit/evk-pro3/readme.txt Signed-off-by: Fabio Porcedda <fabio.porcedda@gmail.com> Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
229 lines
6.6 KiB
Diff
229 lines
6.6 KiB
Diff
From e1d54ffb987c346c45c20968be34c50c62a91c07 Mon Sep 17 00:00:00 2001
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From: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Date: Wed, 14 Nov 2012 19:17:47 +0800
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Subject: [PATCH 2/5] watchdog: add at91sam9 watchdog support
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with keep alive support
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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---
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drivers/watchdog/Kconfig | 7 +++
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drivers/watchdog/Makefile | 1 +
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drivers/watchdog/at91sam9_wdt.c | 131 ++++++++++++++++++++++++++++++++++++++++
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drivers/watchdog/at91sam9_wdt.h | 38 ++++++++++++
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4 files changed, 177 insertions(+)
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create mode 100644 drivers/watchdog/at91sam9_wdt.c
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create mode 100644 drivers/watchdog/at91sam9_wdt.h
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diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
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index 0b4dc84..98a21d7 100644
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--- a/drivers/watchdog/Kconfig
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+++ b/drivers/watchdog/Kconfig
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@@ -11,6 +11,13 @@ menuconfig WATCHDOG
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if WATCHDOG
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+config WATCHDOG_AT91SAM9X
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+ tristate "AT91SAM9X / AT91CAP9 watchdog"
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+ depends on ARCH_AT91
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+ help
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+ Watchdog timer embedded into AT91SAM9X and AT91CAP9 chips. This will
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+ reboot your system when the timeout is reached.
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+
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config WATCHDOG_MXS28
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bool "i.MX28"
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depends on ARCH_IMX28
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diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
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index f522b88..3d15d52 100644
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--- a/drivers/watchdog/Makefile
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+++ b/drivers/watchdog/Makefile
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@@ -1,3 +1,4 @@
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obj-$(CONFIG_WATCHDOG) += wd_core.o
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+obj-$(CONFIG_WATCHDOG_AT91SAM9X) += at91sam9_wdt.o
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obj-$(CONFIG_WATCHDOG_MXS28) += im28wd.o
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obj-$(CONFIG_WATCHDOG_IMX_RESET_SOURCE) += imxwd.o
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diff --git a/drivers/watchdog/at91sam9_wdt.c b/drivers/watchdog/at91sam9_wdt.c
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new file mode 100644
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index 0000000..203d83a
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--- /dev/null
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+++ b/drivers/watchdog/at91sam9_wdt.c
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@@ -0,0 +1,131 @@
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+/*
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+ * (c) 2012 Juergen Beisert <kernel@pengutronix.de>
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License as published by
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+ * the Free Software Foundation; either version 2 of the License, or
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+ * (at your option) any later version.
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+ *
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+ * This program is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ *
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+ * Note: this driver works for the i.MX28 SoC. It might work for the
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+ * i.MX23 Soc as well, but is not tested yet.
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+ */
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+
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+#include <common.h>
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+#include <init.h>
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+#include <io.h>
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+#include <errno.h>
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+#include <malloc.h>
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+#include <watchdog.h>
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+
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+#include "at91sam9_wdt.h"
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+
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+struct at91sam9_wdt {
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+ struct watchdog wdt;
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+ void __iomem *base;
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+};
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+
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+#define to_at91sam9_wdt(h) container_of(h, struct at91sam9_wdt, wdt)
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+
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+#define wdt_read(at91wdt, field) \
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+ __raw_readl(at91wdt->base + field)
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+#define wdt_write(at91wdt, field, val) \
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+ __raw_writel((val), at91wdt->base + field)
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+
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+static void at91sam9_wdt_keep_alive(struct watchdog *wdt)
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+{
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+ struct at91sam9_wdt *at91wdt = to_at91sam9_wdt(wdt);
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+
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+ wdt_write(at91wdt, AT91_WDT_CR, AT91_WDT_KEY | AT91_WDT_WDRSTT);
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+}
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+
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+static int at91sam9_wdt_settimeout(struct watchdog *wdt, unsigned int timeout)
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+{
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+ struct at91sam9_wdt *at91wdt = to_at91sam9_wdt(wdt);
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+ unsigned int reg;
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+ unsigned int mr;
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+
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+ /* Check if disabled */
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+ mr = wdt_read(at91wdt, AT91_WDT_MR);
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+ if (mr & AT91_WDT_WDDIS) {
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+ pr_err("sorry, watchdog is disabled\n");
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+ return -EIO;
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+ }
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+
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+ if (!timeout) {
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+ wdt_write(at91wdt, AT91_WDT_MR, AT91_WDT_WDDIS);
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+ return 0;
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+ }
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+
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+ /*
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+ * All counting occurs at SLOW_CLOCK / 128 = 256 Hz
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+ *
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+ * Since WDV is a 12-bit counter, the maximum period is
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+ * 4096 / 256 = 16 seconds.
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+ */
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+ reg = AT91_WDT_WDRSTEN /* causes watchdog reset */
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+ /* | AT91_WDT_WDRPROC causes processor reset only */
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+ | AT91_WDT_WDDBGHLT /* disabled in debug mode */
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+ | AT91_WDT_WDD /* restart at any time */
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+ | (timeout & AT91_WDT_WDV); /* timer value */
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+ wdt_write(at91wdt, AT91_WDT_MR, reg);
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+
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+ return 0;
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+}
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+
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+static int at91sam9_wdt_probe(struct device_d *dev)
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+{
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+ struct at91sam9_wdt *priv;
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+ struct watchdog *wdt;
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+ int ret;
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+ unsigned int mr;
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+
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+ priv = xzalloc(sizeof(struct at91sam9_wdt));
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+ priv->base = dev_request_mem_region(dev, 0);
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+ wdt = &priv->wdt;
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+
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+ wdt->set_timeout = at91sam9_wdt_settimeout;
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+ wdt->keep_alive = at91sam9_wdt_keep_alive;
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+
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+ /* Check if disabled */
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+ mr = wdt_read(priv, AT91_WDT_MR);
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+ if (mr & AT91_WDT_WDDIS) {
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+ dev_err(dev, "sorry, watchdog is disabled\n");
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+ ret = -EIO;
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+ goto err;
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+ }
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+
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+ ret = watchdog_register(wdt);
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+ if (ret != 0)
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+ goto err;
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+
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+ dev->priv = priv;
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+ return 0;
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+
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+err:
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+ free(priv);
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+ return ret;
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+}
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+
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+static void at91sam9_wdt_remove(struct device_d *dev)
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+{
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+ struct at91sam9_wdt *priv= dev->priv;
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+ watchdog_deregister(&priv->wdt);
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+ free(priv);
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+}
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+
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+static struct driver_d at91sam9_wdt_driver = {
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+ .name = "at91sam9_wdt",
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+ .probe = at91sam9_wdt_probe,
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+ .remove = at91sam9_wdt_remove,
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+};
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+
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+static int at91sam9_wdt_init(void)
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+{
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+ return platform_driver_register(&at91sam9_wdt_driver);
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+}
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+coredevice_initcall(at91sam9_wdt_init);
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diff --git a/drivers/watchdog/at91sam9_wdt.h b/drivers/watchdog/at91sam9_wdt.h
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new file mode 100644
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index 0000000..2b68c1a
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--- /dev/null
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+++ b/drivers/watchdog/at91sam9_wdt.h
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@@ -0,0 +1,38 @@
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+/*
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+ * drivers/watchdog/at91sam9_wdt.h
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+ *
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+ * Copyright (C) 2007 Andrew Victor
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+ * Copyright (C) 2007 Atmel Corporation.
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+ *
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+ * Watchdog Timer (WDT) - System peripherals regsters.
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+ * Based on AT91SAM9261 datasheet revision D.
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License as published by
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+ * the Free Software Foundation; either version 2 of the License, or
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+ * (at your option) any later version.
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+ */
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+
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+#ifndef AT91_WDT_H
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+#define AT91_WDT_H
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+
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+#define AT91_WDT_CR 0x00 /* Watchdog Control Register */
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+#define AT91_WDT_WDRSTT (1 << 0) /* Restart */
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+#define AT91_WDT_KEY (0xa5 << 24) /* KEY Password */
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+
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+#define AT91_WDT_MR 0x04 /* Watchdog Mode Register */
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+#define AT91_WDT_WDV (0xfff << 0) /* Counter Value */
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+#define AT91_WDT_WDFIEN (1 << 12) /* Fault Interrupt Enable */
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+#define AT91_WDT_WDRSTEN (1 << 13) /* Reset Processor */
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+#define AT91_WDT_WDRPROC (1 << 14) /* Timer Restart */
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+#define AT91_WDT_WDDIS (1 << 15) /* Watchdog Disable */
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+#define AT91_WDT_WDD (0xfff << 16) /* Delta Value */
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+#define AT91_WDT_WDDBGHLT (1 << 28) /* Debug Halt */
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+#define AT91_WDT_WDIDLEHLT (1 << 29) /* Idle Halt */
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+
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+#define AT91_WDT_SR 0x08 /* Watchdog Status Register */
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+#define AT91_WDT_WDUNF (1 << 0) /* Watchdog Underflow */
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+#define AT91_WDT_WDERR (1 << 1) /* Watchdog Error */
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+
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+
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+#endif
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--
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1.8.1.4
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