c0719217e1
Remove upstream patch [1]
1002-xtensa-backport-fix-for-PR-target-90922.patch
[1] 0110ab63c0
See:
https://gcc.gnu.org/ml/gcc/2019-11/msg00099.html
Signed-off-by: Romain Naour <romain.naour@gmail.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
324 lines
12 KiB
Diff
324 lines
12 KiB
Diff
From f1c05207166a16d0a6242f2fa642adc439f835a8 Mon Sep 17 00:00:00 2001
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From: ktkachov <ktkachov@138bc75d-0d04-0410-961f-82ee72b054a4>
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Date: Tue, 5 Jun 2018 09:50:16 +0000
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Subject: [PATCH] PR target/81497: Fix arm_acle.h for C++
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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When trying to compile something with arm_acle.h using G++ we get a number of nasty errors:
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arm_acle.h:48:49: error: invalid conversion from ‘const void*’ to ‘const int*’ [-fpermissive]
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return __builtin_arm_ldc (__coproc, __CRd, __p);
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This is because the intrinsics that are supposed to be void return the "result" of their builtin,
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which is void. C lets that slide but C++ complains.
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After fixing that we run into further errors:
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arm_acle.h:48:46: error: invalid conversion from 'const void*' to 'const int*' [-fpermissive]
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return __builtin_arm_ldc (__coproc, __CRd, __p);
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^~~
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Because the pointer arguments in these intrinsics are void pointers but the builtin
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expects int pointers. So this patch introduces new qualifiers for void pointers and their
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const-qualified versions and uses that in the specification of these intrinsics.
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This gives us the opportunity of creating an arm subdirectory in g++.dg and inaugurates it
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with the first arm-specific C++ tests (in that directory).
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PR target/81497
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* config/arm/arm-builtins.c (arm_type_qualifiers): Add
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qualifier_void_pointer and qualifier_const_void_pointer.
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(arm_ldc_qualifiers, arm_stc_qualifiers): Use the above.
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(arm_init_builtins): Handle the above.
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* config/arm/arm_acle.h (__arm_cdp, __arm_ldc, __arm_ldcl, __arm_stc,
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__arm_stcl, __arm_mcr, __arm_cdp2, __arm_ldc2, __arm_ldcl2, __arm_stc2,
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__arm_stcl2,__arm_mcr2, __arm_mcrr, __arm_mcrr2): Remove return for
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void intrinsics.
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* g++.target/arm/arm.exp: New file.
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* g++.target/arm/pr81497.C: Likewise.
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git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@261191 138bc75d-0d04-0410-961f-82ee72b054a4
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Upstream-Status: Merged (gcc-8-branch)
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Signed-off-by: Gaël PORTAY <gael.portay@savoirfairelinux.com>
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[gportay: drop gcc/{,testsuite/}ChangeLog changes]
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Signed-off-by: Romain Naour <romain.naour@gmail.com>
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---
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gcc/config/arm/arm-builtins.c | 42 +++++++++++++---------
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gcc/config/arm/arm_acle.h | 28 +++++++--------
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gcc/testsuite/g++.target/arm/arm.exp | 50 ++++++++++++++++++++++++++
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gcc/testsuite/g++.target/arm/pr81497.C | 9 +++++
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4 files changed, 99 insertions(+), 30 deletions(-)
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create mode 100644 gcc/testsuite/g++.target/arm/arm.exp
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create mode 100644 gcc/testsuite/g++.target/arm/pr81497.C
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diff --git a/gcc/config/arm/arm-builtins.c b/gcc/config/arm/arm-builtins.c
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index d3b67184362..dd56f13251f 100644
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--- a/gcc/config/arm/arm-builtins.c
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+++ b/gcc/config/arm/arm-builtins.c
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@@ -75,7 +75,11 @@ enum arm_type_qualifiers
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/* Lane indices - must be within range of previous argument = a vector. */
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qualifier_lane_index = 0x200,
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/* Lane indices for single lane structure loads and stores. */
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- qualifier_struct_load_store_lane_index = 0x400
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+ qualifier_struct_load_store_lane_index = 0x400,
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+ /* A void pointer. */
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+ qualifier_void_pointer = 0x800,
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+ /* A const void pointer. */
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+ qualifier_const_void_pointer = 0x802
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};
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/* The qualifier_internal allows generation of a unary builtin from
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@@ -185,7 +189,7 @@ arm_cdp_qualifiers[SIMD_MAX_BUILTIN_ARGS]
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static enum arm_type_qualifiers
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arm_ldc_qualifiers[SIMD_MAX_BUILTIN_ARGS]
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= { qualifier_void, qualifier_unsigned_immediate,
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- qualifier_unsigned_immediate, qualifier_const_pointer };
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+ qualifier_unsigned_immediate, qualifier_const_void_pointer };
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#define LDC_QUALIFIERS \
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(arm_ldc_qualifiers)
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@@ -193,7 +197,7 @@ arm_ldc_qualifiers[SIMD_MAX_BUILTIN_ARGS]
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static enum arm_type_qualifiers
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arm_stc_qualifiers[SIMD_MAX_BUILTIN_ARGS]
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= { qualifier_void, qualifier_unsigned_immediate,
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- qualifier_unsigned_immediate, qualifier_pointer };
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+ qualifier_unsigned_immediate, qualifier_void_pointer };
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#define STC_QUALIFIERS \
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(arm_stc_qualifiers)
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@@ -1079,19 +1083,25 @@ arm_init_builtin (unsigned int fcode, arm_builtin_datum *d,
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if (qualifiers & qualifier_pointer && VECTOR_MODE_P (op_mode))
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op_mode = GET_MODE_INNER (op_mode);
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- eltype = arm_simd_builtin_type
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- (op_mode,
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- (qualifiers & qualifier_unsigned) != 0,
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- (qualifiers & qualifier_poly) != 0);
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- gcc_assert (eltype != NULL);
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-
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- /* Add qualifiers. */
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- if (qualifiers & qualifier_const)
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- eltype = build_qualified_type (eltype, TYPE_QUAL_CONST);
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-
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- if (qualifiers & qualifier_pointer)
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- eltype = build_pointer_type (eltype);
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-
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+ /* For void pointers we already have nodes constructed by the midend. */
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+ if (qualifiers & qualifier_void_pointer)
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+ eltype = qualifiers & qualifier_const
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+ ? const_ptr_type_node : ptr_type_node;
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+ else
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+ {
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+ eltype
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+ = arm_simd_builtin_type (op_mode,
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+ (qualifiers & qualifier_unsigned) != 0,
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+ (qualifiers & qualifier_poly) != 0);
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+ gcc_assert (eltype != NULL);
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+
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+ /* Add qualifiers. */
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+ if (qualifiers & qualifier_const)
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+ eltype = build_qualified_type (eltype, TYPE_QUAL_CONST);
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+
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+ if (qualifiers & qualifier_pointer)
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+ eltype = build_pointer_type (eltype);
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+ }
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/* If we have reached arg_num == 0, we are at a non-void
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return type. Otherwise, we are still processing
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arguments. */
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diff --git a/gcc/config/arm/arm_acle.h b/gcc/config/arm/arm_acle.h
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index 972e28edb86..69c29df4313 100644
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--- a/gcc/config/arm/arm_acle.h
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+++ b/gcc/config/arm/arm_acle.h
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@@ -38,35 +38,35 @@ __arm_cdp (const unsigned int __coproc, const unsigned int __opc1,
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const unsigned int __CRd, const unsigned int __CRn,
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const unsigned int __CRm, const unsigned int __opc2)
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{
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- return __builtin_arm_cdp (__coproc, __opc1, __CRd, __CRn, __CRm, __opc2);
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+ __builtin_arm_cdp (__coproc, __opc1, __CRd, __CRn, __CRm, __opc2);
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}
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__extension__ static __inline void __attribute__ ((__always_inline__))
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__arm_ldc (const unsigned int __coproc, const unsigned int __CRd,
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const void * __p)
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{
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- return __builtin_arm_ldc (__coproc, __CRd, __p);
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+ __builtin_arm_ldc (__coproc, __CRd, __p);
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}
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__extension__ static __inline void __attribute__ ((__always_inline__))
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__arm_ldcl (const unsigned int __coproc, const unsigned int __CRd,
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const void * __p)
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{
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- return __builtin_arm_ldcl (__coproc, __CRd, __p);
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+ __builtin_arm_ldcl (__coproc, __CRd, __p);
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}
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__extension__ static __inline void __attribute__ ((__always_inline__))
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__arm_stc (const unsigned int __coproc, const unsigned int __CRd,
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void * __p)
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{
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- return __builtin_arm_stc (__coproc, __CRd, __p);
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+ __builtin_arm_stc (__coproc, __CRd, __p);
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}
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__extension__ static __inline void __attribute__ ((__always_inline__))
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__arm_stcl (const unsigned int __coproc, const unsigned int __CRd,
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void * __p)
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{
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- return __builtin_arm_stcl (__coproc, __CRd, __p);
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+ __builtin_arm_stcl (__coproc, __CRd, __p);
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}
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__extension__ static __inline void __attribute__ ((__always_inline__))
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@@ -74,7 +74,7 @@ __arm_mcr (const unsigned int __coproc, const unsigned int __opc1,
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uint32_t __value, const unsigned int __CRn, const unsigned int __CRm,
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const unsigned int __opc2)
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{
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- return __builtin_arm_mcr (__coproc, __opc1, __value, __CRn, __CRm, __opc2);
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+ __builtin_arm_mcr (__coproc, __opc1, __value, __CRn, __CRm, __opc2);
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}
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__extension__ static __inline uint32_t __attribute__ ((__always_inline__))
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@@ -90,35 +90,35 @@ __arm_cdp2 (const unsigned int __coproc, const unsigned int __opc1,
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const unsigned int __CRd, const unsigned int __CRn,
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const unsigned int __CRm, const unsigned int __opc2)
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{
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- return __builtin_arm_cdp2 (__coproc, __opc1, __CRd, __CRn, __CRm, __opc2);
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+ __builtin_arm_cdp2 (__coproc, __opc1, __CRd, __CRn, __CRm, __opc2);
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}
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__extension__ static __inline void __attribute__ ((__always_inline__))
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__arm_ldc2 (const unsigned int __coproc, const unsigned int __CRd,
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const void * __p)
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{
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- return __builtin_arm_ldc2 (__coproc, __CRd, __p);
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+ __builtin_arm_ldc2 (__coproc, __CRd, __p);
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}
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__extension__ static __inline void __attribute__ ((__always_inline__))
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__arm_ldc2l (const unsigned int __coproc, const unsigned int __CRd,
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const void * __p)
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{
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- return __builtin_arm_ldc2l (__coproc, __CRd, __p);
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+ __builtin_arm_ldc2l (__coproc, __CRd, __p);
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}
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__extension__ static __inline void __attribute__ ((__always_inline__))
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__arm_stc2 (const unsigned int __coproc, const unsigned int __CRd,
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void * __p)
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{
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- return __builtin_arm_stc2 (__coproc, __CRd, __p);
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+ __builtin_arm_stc2 (__coproc, __CRd, __p);
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}
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__extension__ static __inline void __attribute__ ((__always_inline__))
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__arm_stc2l (const unsigned int __coproc, const unsigned int __CRd,
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void * __p)
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{
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- return __builtin_arm_stc2l (__coproc, __CRd, __p);
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+ __builtin_arm_stc2l (__coproc, __CRd, __p);
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}
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__extension__ static __inline void __attribute__ ((__always_inline__))
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@@ -126,7 +126,7 @@ __arm_mcr2 (const unsigned int __coproc, const unsigned int __opc1,
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uint32_t __value, const unsigned int __CRn,
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const unsigned int __CRm, const unsigned int __opc2)
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{
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- return __builtin_arm_mcr2 (__coproc, __opc1, __value, __CRn, __CRm, __opc2);
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+ __builtin_arm_mcr2 (__coproc, __opc1, __value, __CRn, __CRm, __opc2);
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}
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__extension__ static __inline uint32_t __attribute__ ((__always_inline__))
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@@ -143,7 +143,7 @@ __extension__ static __inline void __attribute__ ((__always_inline__))
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__arm_mcrr (const unsigned int __coproc, const unsigned int __opc1,
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uint64_t __value, const unsigned int __CRm)
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{
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- return __builtin_arm_mcrr (__coproc, __opc1, __value, __CRm);
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+ __builtin_arm_mcrr (__coproc, __opc1, __value, __CRm);
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}
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__extension__ static __inline uint64_t __attribute__ ((__always_inline__))
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@@ -159,7 +159,7 @@ __extension__ static __inline void __attribute__ ((__always_inline__))
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__arm_mcrr2 (const unsigned int __coproc, const unsigned int __opc1,
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uint64_t __value, const unsigned int __CRm)
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{
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- return __builtin_arm_mcrr2 (__coproc, __opc1, __value, __CRm);
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+ __builtin_arm_mcrr2 (__coproc, __opc1, __value, __CRm);
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}
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__extension__ static __inline uint64_t __attribute__ ((__always_inline__))
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diff --git a/gcc/testsuite/g++.target/arm/arm.exp b/gcc/testsuite/g++.target/arm/arm.exp
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new file mode 100644
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index 00000000000..1a169d2f220
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--- /dev/null
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+++ b/gcc/testsuite/g++.target/arm/arm.exp
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@@ -0,0 +1,50 @@
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+# Specific regression driver for arm.
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+# Copyright (C) 2009-2018 Free Software Foundation, Inc.
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+#
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+# This file is part of GCC.
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+#
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+# GCC is free software; you can redistribute it and/or modify it
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+# under the terms of the GNU General Public License as published by
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+# the Free Software Foundation; either version 3, or (at your option)
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+# any later version.
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+#
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+# GCC is distributed in the hope that it will be useful, but
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+# WITHOUT ANY WARRANTY; without even the implied warranty of
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+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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+# General Public License for more details.
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+#
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+# You should have received a copy of the GNU General Public License
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+# along with GCC; see the file COPYING3. If not see
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+# <http://www.gnu.org/licenses/>. */
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+
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+# GCC testsuite that uses the `dg.exp' driver.
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+
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+# Exit immediately if this isn't an arm target.
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+if {![istarget arm*-*-*] } then {
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+ return
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+}
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+
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+# Load support procs.
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+load_lib g++-dg.exp
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+
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+global DEFAULT_CXXFLAGS
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+if ![info exists DEFAULT_CXXFLAGS] then {
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+ set DEFAULT_CXXFLAGS " -pedantic-errors"
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+}
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+
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+
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+global dg_runtest_extra_prunes
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+set dg_runtest_extra_prunes ""
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+lappend dg_runtest_extra_prunes "warning: switch -m(cpu|arch)=.* conflicts with -m(cpu|arch)=.* switch"
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+
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+# Initialize `dg'.
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+dg-init
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+
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+# Main loop.
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+dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/*.C]] \
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+ "" $DEFAULT_CXXFLAGS
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+
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+# All done.
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+set dg_runtest_extra_prunes ""
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+dg-finish
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+
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diff --git a/gcc/testsuite/g++.target/arm/pr81497.C b/gcc/testsuite/g++.target/arm/pr81497.C
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new file mode 100644
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index 00000000000..0519a3a3045
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--- /dev/null
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+++ b/gcc/testsuite/g++.target/arm/pr81497.C
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@@ -0,0 +1,9 @@
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+/* { dg-do compile } */
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+/* { dg-require-effective-target arm_thumb2_ok } */
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+
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+#include <arm_acle.h>
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+
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+int main ()
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+{
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+ return 0;
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+}
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--
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2.21.0
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