Mark Corbin ae99fa6d64 arch: add support for RISC-V 32-bit (riscv32) architecture ... This enables a riscv32 system to be built with a Buildroot generated toolchain (gcc >= 7.x, binutils >= 2.30, glibc only). This requires a custom version of glibc 2.26 from the riscv-glibc repository. Note that there are no tags in this repository, so the glibc version just consists of the 40 character commit id string. Thanks to Fabrice Bellard for pointing me towards the 32-bit glibc repository and for providing the necessary patch to get it to build. Signed-off-by: Mark Corbin <mark.corbin@embecosm.com> Reviewed-by: Matt Weber <matthew.weber@rockwellcollins.com> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>		2019-01-06 14:09:31 +01:00
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4e2943456e690d89f48e6e710757dd09404b0c9a	arch: add support for RISC-V 32-bit (riscv32) architecture	2019-01-06 14:09:31 +01:00
arc-2018.09-release	toolchain: bumb ARC tools to arc-2018.09 release	2018-11-29 21:32:51 +01:00
glibc-2.28-69-g1e5c5303a522764d7e9d2302a60e4a32cdb902f1	package/glibc: bump version for more post-2.28 fixes	2019-01-03 22:07:55 +01:00
Config.in	toolchain: disable SSP support if CFI support in binutils is missing	2018-11-04 12:49:25 +01:00
glibc.hash
glibc.mk	arch: add support for RISC-V 32-bit (riscv32) architecture	2019-01-06 14:09:31 +01:00
nsswitch.conf