874916567a
The MMU option is currently located in the "Toolchain" menu, but it doesn't make sense as it's really architecture related. In addition, the selection of MMU has an impact on the choice of binary format available, which is visible in the architecture menu. Therefore, this commit moves the MMU option into the architecture menu. However, if we simply move it in arch/Config.in, it means that we would have the following order of options: Target architecture Target architecture variant ABI MMU Binary format But really, the MMU option should be right below the Target architecture variant, and the available ABIs derived from that. The variant and ABI are arch-specfic, and defined in the per-arch Config.in fragments; a Kconfig option can have only one prompt defined, even under conditions, and appears at the place in the menu where its prompt was defined. So, there is no (easy) possibility to have a generic option appear where we want it. Since in fact only 2 architectures show a visible prompt for the MMU option (RISC-V and Xtensa), we move this option in arch/Config.in.riscv and arch/Config.in.xtensa. Some walkthrough the commit: - BR2_ARCH_HAS_MMU_MANDATORY and BR2_ARCH_HAS_MMU_OPTIONAL are removed as they are no longer needed - BR2_USE_MMU becomes a hidden boolean - All the places where we used to select BR2_ARCH_HAS_MMU_MANDATORY now select BR2_USE_MMU directly. - Introduce BR2_RISCV_USE_MMU and BR2_XTENSA_USE_MMU. - All defconfigs that used "# BR2_USE_MMU is not set" are switched to using the new option. All in all, this simplifies things quite a bit, and allows to have a good option ordering in the Target architecture menu. This commit might raise a concern in terms of backward compatibility with existing configurations. The only configurations that will be broken by this change are RISC-V noMMU (which was very recently introduced) and Xtensa noMMU (which we can probably agree is not such a widely popular configuration). Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Reviewed-by: Damien Le Moal <damien.lemoal@opensource.wdc.com> Tested-by: Damien Le Moal <damien.lemoal@opensource.wdc.com> [yann.morin.1998@free.fr: - expand further why we need per-arch MMU options ] Signed-off-by: Yann E. MORIN <yann.morin.1998@free.fr>
149 lines
3.0 KiB
Plaintext
149 lines
3.0 KiB
Plaintext
# RISC-V CPU ISA extensions.
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config BR2_RISCV_ISA_RVI
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bool
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config BR2_RISCV_ISA_RVM
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bool
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config BR2_RISCV_ISA_RVA
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bool
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config BR2_RISCV_ISA_RVF
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bool
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config BR2_RISCV_ISA_RVD
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bool
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config BR2_RISCV_ISA_RVC
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bool
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choice
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prompt "Target Architecture Variant"
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default BR2_riscv_g
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config BR2_riscv_g
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bool "General purpose (G)"
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select BR2_RISCV_ISA_RVI
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select BR2_RISCV_ISA_RVM
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select BR2_RISCV_ISA_RVA
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select BR2_RISCV_ISA_RVF
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select BR2_RISCV_ISA_RVD
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help
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General purpose (G) is equivalent to IMAFD.
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config BR2_riscv_custom
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bool "Custom architecture"
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select BR2_RISCV_ISA_RVI
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select BR2_RISCV_ISA_CUSTOM_RVA
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endchoice
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if BR2_riscv_custom
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comment "Instruction Set Extensions"
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config BR2_RISCV_ISA_CUSTOM_RVM
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bool "Integer Multiplication and Division (M)"
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select BR2_RISCV_ISA_RVM
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config BR2_RISCV_ISA_CUSTOM_RVA
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bool "Atomic Instructions (A)"
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select BR2_RISCV_ISA_RVA
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config BR2_RISCV_ISA_CUSTOM_RVF
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bool "Single-precision Floating-point (F)"
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select BR2_RISCV_ISA_RVF
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config BR2_RISCV_ISA_CUSTOM_RVD
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bool "Double-precision Floating-point (D)"
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depends on BR2_RISCV_ISA_RVF
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select BR2_RISCV_ISA_RVD
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config BR2_RISCV_ISA_CUSTOM_RVC
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bool "Compressed Instructions (C)"
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select BR2_RISCV_ISA_RVC
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endif
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choice
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prompt "Target Architecture Size"
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default BR2_RISCV_64
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config BR2_RISCV_32
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bool "32-bit"
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select BR2_USE_MMU
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config BR2_RISCV_64
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bool "64-bit"
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select BR2_ARCH_IS_64
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endchoice
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config BR2_RISCV_USE_MMU
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bool "MMU support"
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default y
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depends on BR2_RISCV_64
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select BR2_USE_MMU
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help
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Enable this option if your RISC-V core has a MMU (Memory
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Management Unit).
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choice
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prompt "Target ABI"
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default BR2_RISCV_ABI_ILP32D if !BR2_ARCH_IS_64 && BR2_RISCV_ISA_RVD
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default BR2_RISCV_ABI_ILP32F if !BR2_ARCH_IS_64 && BR2_RISCV_ISA_RVF
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default BR2_RISCV_ABI_ILP32 if !BR2_ARCH_IS_64
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default BR2_RISCV_ABI_LP64D if BR2_ARCH_IS_64 && BR2_RISCV_ISA_RVD
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default BR2_RISCV_ABI_LP64F if BR2_ARCH_IS_64 && BR2_RISCV_ISA_RVF
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default BR2_RISCV_ABI_LP64 if BR2_ARCH_IS_64
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config BR2_RISCV_ABI_ILP32
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bool "ilp32"
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depends on !BR2_ARCH_IS_64
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config BR2_RISCV_ABI_ILP32F
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bool "ilp32f"
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depends on !BR2_ARCH_IS_64 && BR2_RISCV_ISA_RVF
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config BR2_RISCV_ABI_ILP32D
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bool "ilp32d"
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depends on !BR2_ARCH_IS_64 && BR2_RISCV_ISA_RVD
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config BR2_RISCV_ABI_LP64
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bool "lp64"
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depends on BR2_ARCH_IS_64
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config BR2_RISCV_ABI_LP64F
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bool "lp64f"
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depends on BR2_ARCH_IS_64 && BR2_RISCV_ISA_RVF
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depends on BR2_USE_MMU
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config BR2_RISCV_ABI_LP64D
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bool "lp64d"
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depends on BR2_ARCH_IS_64 && BR2_RISCV_ISA_RVD
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endchoice
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config BR2_ARCH
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default "riscv32" if !BR2_ARCH_IS_64
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default "riscv64" if BR2_ARCH_IS_64
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config BR2_NORMALIZED_ARCH
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default "riscv"
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config BR2_ENDIAN
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default "LITTLE"
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config BR2_GCC_TARGET_ABI
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default "ilp32" if BR2_RISCV_ABI_ILP32
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default "ilp32f" if BR2_RISCV_ABI_ILP32F
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default "ilp32d" if BR2_RISCV_ABI_ILP32D
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default "lp64" if BR2_RISCV_ABI_LP64
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default "lp64f" if BR2_RISCV_ABI_LP64F
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default "lp64d" if BR2_RISCV_ABI_LP64D
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config BR2_READELF_ARCH_NAME
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default "RISC-V"
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# vim: ft=kconfig
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# -*- mode:kconfig; -*-
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