5e6fa93483
Fixes #10856 The SSE_GENERIC target fails to build with a "sgemm_kernel.o: No such file or directory" error. Several upstream bug reports exist for this: https://github.com/xianyi/OpenBLAS/issues/502 https://github.com/xianyi/OpenBLAS/issues/685 In both cases, upstream suggests using a different target definition instead. E.G. from issue 685: You may use NORTHWOOD on x86: make TARGET=NORTHWOOD that uses SSE2 instructions. It's very hard to find non-SSE2 x86 CPUs today. For x86-64 use the PRESCOTT target So drop the SSE_GENERIC target. The only x86_64 variant we support not covered by a more specific openblas target is the default variant, nocona and jaguar. Nocona was a Xeon variant of the P4 "Prescott" architecture, so use the PRESCOTT openblas target: https://en.wikipedia.org/wiki/Xeon#Nocona_and_Irwindale Jaguar is from the Bobcat family, so use the BOBCAT openblas target: https://en.wikipedia.org/wiki/List_of_AMD_microprocessors#Bobcat_core_architecture_(APU) [Peter: add Jaguar as pointed out by Arnout] Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
77 lines
3.1 KiB
Plaintext
77 lines
3.1 KiB
Plaintext
config BR2_PACKAGE_OPENBLAS_DEFAULT_TARGET
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string
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default "P2" if BR2_x86_pentium2
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default "KATMAI" if BR2_x86_pentium3
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default "NORTHWOOD" if BR2_x86_pentium4
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default "PRESCOTT" if BR2_x86_prescott || BR2_x86_nocona
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default "BANIAS" if BR2_x86_pentium_m
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default "CORE2" if BR2_x86_core2
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default "NEHALEM" if BR2_x86_corei7 || BR2_x86_silvermont
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default "SANDYBRIDGE" if BR2_x86_corei7_avx
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default "HASWELL" if BR2_x86_core_avx2
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default "ATOM" if BR2_x86_atom
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default "ATHLON" if BR2_x86_athlon || BR2_x86_athlon_4
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default "OPTERON" if BR2_x86_opteron
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default "OPTERON_SSE3" if BR2_x86_opteron_sse3
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default "BARCELONA" if BR2_x86_barcelona
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default "JAGUAR" if BR2_x86_jaguar
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default "STEAMROLLER" if BR2_x86_steamroller
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default "VIAC3" if BR2_x86_c3 || BR2_x86_c32
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default "POWER4" if BR2_powerpc_power4
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default "POWER5" if BR2_powerpc_power5
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default "POWER6" if BR2_powerpc_power6
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default "POWER7" if BR2_powerpc_power7
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default "POWER8" if BR2_powerpc_power8
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default "PPCG4" if BR2_powerpc_7400 || BR2_powerpc_7450
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default "PPC970" if BR2_powerpc_970
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default "PPC440" if BR2_powerpc_440
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default "PPC440FP2" if BR2_powerpc_440fp
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# P5600 is built with MSA support which is only available in Codescape toolchains
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default "P5600" if BR2_mips_p5600 && BR2_TOOLCHAIN_EXTERNAL_CODESCAPE_MTI_MIPS
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default "SICORTEX" if BR2_MIPS_CPU_MIPS64
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# I6400 is built with MSA support which is only available in Codescape toolchains
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default "I6400" if BR2_mips_i6400 && BR2_TOOLCHAIN_EXTERNAL_CODESCAPE_IMG_MIPS
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# OpenBLAS assumes SPARC=Sparc v9
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default "SPARC" if BR2_sparc_v9
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# Cortex-A15 always have a VFPv4
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default "CORTEXA15" if (BR2_cortex_a15 && BR2_ARM_EABIHF)
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# Cortex-A9 have an optional VFPv3, so we need to make sure it
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# is available
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default "CORTEXA9" if (BR2_cortex_a9 && BR2_ARM_EABIHF && \
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BR2_ARM_CPU_HAS_VFPV3)
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default "ARMV5" if BR2_ARM_CPU_ARMV5
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# On ARMv6, OpenBLAS assumes that a VFP is available, and
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# EABIhf is used
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default "ARMV6" if (BR2_ARM_CPU_ARMV6 && BR2_ARM_EABIHF && \
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BR2_ARM_CPU_HAS_VFPV2)
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# On ARMv7, OpenBLAS assumes that a full VFPv3+ is available
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# (and not the more limited D16 variant), and that EABIhf is
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# used.
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default "ARMV7" if (BR2_ARM_CPU_ARMV7A && BR2_ARM_EABIHF && \
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BR2_ARM_CPU_HAS_VFPV3)
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default "ARMV8" if BR2_aarch64 || BR2_aarch64_be
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help
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OpenBLAS target CPU. See TargetList.txt in the source tree for
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the possible target strings. A possible value is set
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automatically based on your Target Architecture Variant.
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config BR2_PACKAGE_OPENBLAS_ARCH_SUPPORTS
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bool
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default y if BR2_PACKAGE_OPENBLAS_DEFAULT_TARGET != ""
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config BR2_PACKAGE_OPENBLAS
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bool "openblas"
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depends on BR2_PACKAGE_OPENBLAS_ARCH_SUPPORTS
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help
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An optimized BLAS library based on GotoBLAS2 1.13 BSD version.
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https://www.openblas.net/
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if BR2_PACKAGE_OPENBLAS
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config BR2_PACKAGE_OPENBLAS_TARGET
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string "OpenBLAS target CPU"
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default BR2_PACKAGE_OPENBLAS_DEFAULT_TARGET
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endif
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