d04ea6e4e8
This config option corresponds to the string returned by readelf for the "Machine" field of the ELF header. It will be used to check if the architecture of binaries built by Buildroot match the target architecture. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
282 lines
7.6 KiB
Plaintext
282 lines
7.6 KiB
Plaintext
# i386/x86_64 cpu features
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config BR2_X86_CPU_HAS_MMX
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bool
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config BR2_X86_CPU_HAS_SSE
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bool
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config BR2_X86_CPU_HAS_SSE2
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bool
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config BR2_X86_CPU_HAS_SSE3
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bool
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config BR2_X86_CPU_HAS_SSSE3
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bool
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config BR2_X86_CPU_HAS_SSE4
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bool
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config BR2_X86_CPU_HAS_SSE42
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bool
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config BR2_X86_CPU_HAS_AVX
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bool
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config BR2_X86_CPU_HAS_AVX2
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bool
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choice
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prompt "Target Architecture Variant"
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depends on BR2_i386 || BR2_x86_64
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default BR2_x86_i586 if BR2_i386
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help
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Specific CPU variant to use
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config BR2_x86_i486
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bool "i486"
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depends on !BR2_x86_64
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config BR2_x86_i586
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bool "i586"
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depends on !BR2_x86_64
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config BR2_x86_x1000
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bool "x1000"
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depends on !BR2_x86_64
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help
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The Intel X1000 is a Pentium class microprocessor in the
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Quark (sub-Atom) Product Line. The X1000 has a bug on the
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lock prefix requiring that prefix must be stripped at build
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time.
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See https://en.wikipedia.org/wiki/Intel_Quark
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config BR2_x86_i686
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bool "i686"
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depends on !BR2_x86_64
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config BR2_x86_pentiumpro
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bool "pentium pro"
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depends on !BR2_x86_64
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config BR2_x86_pentium_mmx
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bool "pentium MMX"
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select BR2_X86_CPU_HAS_MMX
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depends on !BR2_x86_64
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config BR2_x86_pentium_m
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bool "pentium mobile"
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select BR2_X86_CPU_HAS_MMX
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select BR2_X86_CPU_HAS_SSE
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depends on !BR2_x86_64
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config BR2_x86_pentium2
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bool "pentium2"
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select BR2_X86_CPU_HAS_MMX
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depends on !BR2_x86_64
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config BR2_x86_pentium3
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bool "pentium3"
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select BR2_X86_CPU_HAS_MMX
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select BR2_X86_CPU_HAS_SSE
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depends on !BR2_x86_64
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config BR2_x86_pentium4
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bool "pentium4"
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select BR2_X86_CPU_HAS_MMX
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select BR2_X86_CPU_HAS_SSE
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select BR2_X86_CPU_HAS_SSE2
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depends on !BR2_x86_64
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config BR2_x86_prescott
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bool "prescott"
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select BR2_X86_CPU_HAS_MMX
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select BR2_X86_CPU_HAS_SSE
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select BR2_X86_CPU_HAS_SSE2
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select BR2_X86_CPU_HAS_SSE3
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depends on !BR2_x86_64
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config BR2_x86_nocona
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bool "nocona"
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select BR2_X86_CPU_HAS_MMX
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select BR2_X86_CPU_HAS_SSE
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select BR2_X86_CPU_HAS_SSE2
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select BR2_X86_CPU_HAS_SSE3
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config BR2_x86_core2
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bool "core2"
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select BR2_X86_CPU_HAS_MMX
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select BR2_X86_CPU_HAS_SSE
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select BR2_X86_CPU_HAS_SSE2
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select BR2_X86_CPU_HAS_SSE3
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select BR2_X86_CPU_HAS_SSSE3
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config BR2_x86_corei7
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bool "corei7"
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select BR2_X86_CPU_HAS_MMX
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select BR2_X86_CPU_HAS_SSE
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select BR2_X86_CPU_HAS_SSE2
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select BR2_X86_CPU_HAS_SSE3
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select BR2_X86_CPU_HAS_SSSE3
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select BR2_X86_CPU_HAS_SSE4
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select BR2_X86_CPU_HAS_SSE42
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config BR2_x86_corei7_avx
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bool "corei7-avx"
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select BR2_X86_CPU_HAS_MMX
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select BR2_X86_CPU_HAS_SSE
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select BR2_X86_CPU_HAS_SSE2
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select BR2_X86_CPU_HAS_SSE3
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select BR2_X86_CPU_HAS_SSSE3
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select BR2_X86_CPU_HAS_SSE4
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select BR2_X86_CPU_HAS_SSE42
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select BR2_X86_CPU_HAS_AVX
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config BR2_x86_core_avx2
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bool "core-avx2"
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select BR2_X86_CPU_HAS_MMX
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select BR2_X86_CPU_HAS_SSE
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select BR2_X86_CPU_HAS_SSE2
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select BR2_X86_CPU_HAS_SSE3
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select BR2_X86_CPU_HAS_SSSE3
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select BR2_X86_CPU_HAS_SSE4
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select BR2_X86_CPU_HAS_SSE42
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select BR2_X86_CPU_HAS_AVX
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select BR2_X86_CPU_HAS_AVX2
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config BR2_x86_atom
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bool "atom"
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select BR2_X86_CPU_HAS_MMX
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select BR2_X86_CPU_HAS_SSE
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select BR2_X86_CPU_HAS_SSE2
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select BR2_X86_CPU_HAS_SSE3
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select BR2_X86_CPU_HAS_SSSE3
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config BR2_x86_k6
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bool "k6"
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select BR2_X86_CPU_HAS_MMX
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depends on !BR2_x86_64
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config BR2_x86_k6_2
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bool "k6-2"
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select BR2_X86_CPU_HAS_MMX
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depends on !BR2_x86_64
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config BR2_x86_athlon
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bool "athlon"
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select BR2_X86_CPU_HAS_MMX
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depends on !BR2_x86_64
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config BR2_x86_athlon_4
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bool "athlon-4"
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select BR2_X86_CPU_HAS_MMX
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select BR2_X86_CPU_HAS_SSE
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depends on !BR2_x86_64
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config BR2_x86_opteron
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bool "opteron"
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select BR2_X86_CPU_HAS_MMX
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select BR2_X86_CPU_HAS_SSE
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select BR2_X86_CPU_HAS_SSE2
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config BR2_x86_opteron_sse3
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bool "opteron w/ SSE3"
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select BR2_X86_CPU_HAS_MMX
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select BR2_X86_CPU_HAS_SSE
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select BR2_X86_CPU_HAS_SSE2
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select BR2_X86_CPU_HAS_SSE3
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config BR2_x86_barcelona
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bool "barcelona"
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select BR2_X86_CPU_HAS_MMX
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select BR2_X86_CPU_HAS_SSE
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select BR2_X86_CPU_HAS_SSE2
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select BR2_X86_CPU_HAS_SSE3
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config BR2_x86_jaguar
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bool "jaguar"
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select BR2_X86_CPU_HAS_MMX
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select BR2_X86_CPU_HAS_SSE
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select BR2_X86_CPU_HAS_SSE2
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select BR2_X86_CPU_HAS_SSE3
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select BR2_X86_CPU_HAS_SSSE3
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select BR2_X86_CPU_HAS_SSE4
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select BR2_X86_CPU_HAS_SSE42
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config BR2_x86_steamroller
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bool "steamroller"
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select BR2_X86_CPU_HAS_MMX
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select BR2_X86_CPU_HAS_SSE
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select BR2_X86_CPU_HAS_SSE2
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select BR2_X86_CPU_HAS_SSE3
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select BR2_X86_CPU_HAS_SSSE3
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select BR2_X86_CPU_HAS_SSE4
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select BR2_X86_CPU_HAS_SSE42
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config BR2_x86_geode
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bool "geode"
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# Don't include MMX support because there several variant of geode
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# processor, some with MMX support, some without.
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# See: http://en.wikipedia.org/wiki/Geode_%28processor%29
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depends on !BR2_x86_64
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config BR2_x86_c3
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bool "Via/Cyrix C3 (Samuel/Ezra cores)"
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select BR2_X86_CPU_HAS_MMX
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depends on !BR2_x86_64
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config BR2_x86_c32
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bool "Via C3-2 (Nehemiah cores)"
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select BR2_X86_CPU_HAS_MMX
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select BR2_X86_CPU_HAS_SSE
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depends on !BR2_x86_64
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config BR2_x86_winchip_c6
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bool "IDT Winchip C6"
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select BR2_X86_CPU_HAS_MMX
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depends on !BR2_x86_64
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config BR2_x86_winchip2
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bool "IDT Winchip 2"
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select BR2_X86_CPU_HAS_MMX
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depends on !BR2_x86_64
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endchoice
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config BR2_ARCH
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default "i486" if BR2_x86_i486
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default "i586" if BR2_x86_i586
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default "i586" if BR2_x86_x1000
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default "i586" if BR2_x86_pentium_mmx
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default "i586" if BR2_x86_geode
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default "i586" if BR2_x86_c3
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default "i686" if BR2_x86_c32
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default "i586" if BR2_x86_winchip_c6
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default "i586" if BR2_x86_winchip2
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default "i686" if BR2_x86_i686
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default "i686" if BR2_x86_pentium2
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default "i686" if BR2_x86_pentium3
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default "i686" if BR2_x86_pentium4
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default "i686" if BR2_x86_pentium_m
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default "i686" if BR2_x86_pentiumpro
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default "i686" if BR2_x86_prescott
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default "i686" if BR2_x86_nocona && BR2_i386
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default "i686" if BR2_x86_core2 && BR2_i386
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default "i686" if BR2_x86_corei7 && BR2_i386
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default "i686" if BR2_x86_corei7_avx && BR2_i386
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default "i686" if BR2_x86_corei7_avx2 && BR2_i386
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default "i686" if BR2_x86_atom && BR2_i386
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default "i686" if BR2_x86_opteron && BR2_i386
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default "i686" if BR2_x86_opteron_sse3 && BR2_i386
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default "i686" if BR2_x86_barcelona && BR2_i386
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default "i686" if BR2_x86_jaguar && BR2_i386
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default "i686" if BR2_x86_steamroller && BR2_i386
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default "i686" if BR2_x86_k6
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default "i686" if BR2_x86_k6_2
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default "i686" if BR2_x86_athlon
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default "i686" if BR2_x86_athlon_4
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default "x86_64" if BR2_x86_64
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config BR2_ENDIAN
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default "LITTLE"
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config BR2_GCC_TARGET_ARCH
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default "i486" if BR2_x86_i486
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default "i586" if BR2_x86_i586
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default "i586" if BR2_x86_x1000
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default "pentium-mmx" if BR2_x86_pentium_mmx
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default "i686" if BR2_x86_i686
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default "pentiumpro" if BR2_x86_pentiumpro
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default "pentium-m" if BR2_x86_pentium_m
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default "pentium2" if BR2_x86_pentium2
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default "pentium3" if BR2_x86_pentium3
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default "pentium4" if BR2_x86_pentium4
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default "prescott" if BR2_x86_prescott
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default "nocona" if BR2_x86_nocona
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default "core2" if BR2_x86_core2
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default "corei7" if BR2_x86_corei7
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default "corei7-avx" if BR2_x86_corei7_avx
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default "core-avx2" if BR2_x86_core_avx2
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default "atom" if BR2_x86_atom
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default "k8" if BR2_x86_opteron
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default "k8-sse3" if BR2_x86_opteron_sse3
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default "barcelona" if BR2_x86_barcelona
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default "btver2" if BR2_x86_jaguar
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default "bdver3" if BR2_x86_steamroller
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default "k6" if BR2_x86_k6
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default "k6-2" if BR2_x86_k6_2
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default "athlon" if BR2_x86_athlon
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default "athlon-4" if BR2_x86_athlon_4
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default "winchip-c6" if BR2_x86_winchip_c6
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default "winchip2" if BR2_x86_winchip2
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default "c3" if BR2_x86_c3
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default "c3-2" if BR2_x86_c32
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default "geode" if BR2_x86_geode
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config BR2_READELF_ARCH_NAME
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default "Intel 80386" if BR2_i386
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default "Advanced Micro Devices X86-64" if BR2_x86_64
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