ea033cecf9
Spike, the RISC-V ISA Simulator, implements a functional model of one or more RISC-V harts. The host package provides an alternative solution to qemu. https://github.com/riscv-software-src/riscv-isa-sim Signed-off-by: Julien Olivain <ju.o@free.fr> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
4 lines
202 B
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4 lines
202 B
Plaintext
# Locally computed
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sha256 9b29c220fed1e867e3bea4b5c565f2629237d525a4d9fe1668699c4406003a1f riscv-isa-sim-1.1.0.tar.gz
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sha256 c65e436d18972c9c4bd192494fe4870bd2e158179474975b80a3559f27631632 LICENSE
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