171075ed4f
Suggested by Yann E. Morin. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Reported-by: "Yann E. MORIN" <yann.morin.1998@free.fr> Acked-by: "Yann E. MORIN" <yann.morin.1998@free.fr> Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
70 lines
1.7 KiB
Plaintext
70 lines
1.7 KiB
Plaintext
choice
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prompt "Target Architecture Variant"
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depends on BR2_sparc
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default BR2_sparc_v7
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help
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Specific CPU variant to use
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config BR2_sparc_v7
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bool "v7"
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config BR2_sparc_cypress
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bool "cypress"
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config BR2_sparc_v8
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bool "v8"
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config BR2_sparc_sparchfleon
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bool "hfleon"
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config BR2_sparc_sparchfleonv8
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bool "hfleonv8"
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config BR2_sparc_sparcsfleon
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bool "sfleon"
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config BR2_sparc_sparcsfleonv8
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bool "sfleonv8"
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config BR2_sparc_supersparc
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bool "supersparc"
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config BR2_sparc_sparclite
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bool "sparclite"
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config BR2_sparc_f930
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bool "f930"
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config BR2_sparc_f934
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bool "f934"
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config BR2_sparc_hypersparc
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bool "hypersparc"
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config BR2_sparc_sparclite86x
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bool "sparclite86x"
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config BR2_sparc_sparclet
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bool "sparclet"
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config BR2_sparc_tsc701
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bool "tsc701"
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endchoice
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config BR2_ARCH
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default "sparc" if BR2_sparc
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config BR2_ENDIAN
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default "BIG"
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config BR2_GCC_TARGET_TUNE
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default "v7" if BR2_sparc_v7
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default "cypress" if BR2_sparc_cypress
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default "v8" if BR2_sparc_v8
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default "supersparc" if BR2_sparc_supersparc
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default "hypersparc" if BR2_sparc_hypersparc
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default "sparclite" if BR2_sparc_sparclite
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default "f930" if BR2_sparc_f930
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default "f934" if BR2_sparc_f934
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default "sparclite86x" if BR2_sparc_sparclite86x
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default "sparclet" if BR2_sparc_sparclet
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default "tsc701" if BR2_sparc_tsc701
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default "v9" if BR2_sparc_v9
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default "v9" if BR2_sparc_v9a
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default "v9" if BR2_sparc_v9b
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default "ultrasparc" if BR2_sparc_ultrasparc
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default "ultrasparc3" if BR2_sparc_ultrasparc3
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default "niagara" if BR2_sparc_niagara
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config BR2_GCC_TARGET_CPU
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default "sparchfleon" if BR2_sparc_sparchfleon
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default "sparchfleonv8" if BR2_sparc_sparchfleonv8
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default "sparcsfleon" if BR2_sparc_sparcsfleon
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default "sparcsfleonv8" if BR2_sparc_sparcsfleonv8
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