20695936ad
This will build kickstart and s1l for the selected board and install them alongside u-boot. Signed-off-by: Alexandre Belloni <abelloni@adeneo-embedded.com> Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
970 lines
22 KiB
Diff
970 lines
22 KiB
Diff
Remove duplicated files to stop the linker from complaining about duplicate
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symbols
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Signed-off-by: Alexandre Belloni <abelloni@adeneo-embedded.com>
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---
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--- a/csps/lpc32xx/bsps/fdi3250/startup/examples/s1l/sysapi_timer.c 2011-10-05 19:10:37.000000000 +0200
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+++ /dev/null 2012-01-01 16:39:47.918907000 +0100
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@@ -1,212 +0,0 @@
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-/***********************************************************************
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- * $Id:: sysapi_timer.c 3394 2010-05-06 17:56:27Z usb10132 $
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- *
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- * Project: Time support functions
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- *
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- * Description:
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- * Implements the following functions required for the S1L API
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- * time_init
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- * time_reset
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- * time_start
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- * time_stop
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- * time_get
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- * time_get_rate
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- *
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- ***********************************************************************
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- * Software that is described herein is for illustrative purposes only
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- * which provides customers with programming information regarding the
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- * products. This software is supplied "AS IS" without any warranties.
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- * NXP Semiconductors assumes no responsibility or liability for the
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- * use of the software, conveys no license or title under any patent,
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- * copyright, or mask work right to the product. NXP Semiconductors
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- * reserves the right to make changes in the software without
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- * notification. NXP Semiconductors also make no representation or
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- * warranty that such application will be suitable for the specified
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- * use without further testing or modification.
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- **********************************************************************/
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-
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-#include "s1l_sys_inf.h"
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-#include "lpc32xx_intc_driver.h"
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-#include "lpc32xx_timer_driver.h"
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-
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-static UNS_64 base_rate;
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-static INT_32 tdev = 0;
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-
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-/***********************************************************************
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- *
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- * Function: time_init
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- *
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- * Purpose: Initializes time system
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- *
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- * Processing: Initializes the system timer.
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- *
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- * Parameters: None
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- *
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- * Outputs: None
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- *
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- * Returns: 0 if the init failed, otherwise non-zero
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- *
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- * Notes: None
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- *
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- **********************************************************************/
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-INT_32 time_init(void)
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-{
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- TMR_PSCALE_SETUP_T pscale;
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-
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- /* Open timer driver */
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- if (tdev == 0)
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- {
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- tdev = timer_open((void *) TIMER_CNTR0, 0);
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- if (tdev != 0)
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- {
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- /* Use a prescale count to 100000 */
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- pscale.ps_tick_val = 100000;
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- pscale.ps_us_val = 0; /* Not needed when ps_tick_val != 0 */
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- timer_ioctl(tdev, TMR_SETUP_PSCALE, (INT_32) &pscale);
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-
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- /* Get timer clock rate */
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- base_rate = (UNS_64) timer_ioctl(tdev, TMR_GET_STATUS,
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- TMR_GET_CLOCK);
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- }
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- }
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-
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- return tdev;
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-}
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-
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-/***********************************************************************
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- *
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- * Function: time_reset
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- *
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- * Purpose: Resets system timer
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- *
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- * Processing:
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- * See function.
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- *
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- * Parameters: None
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- *
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- * Outputs: None
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- *
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- * Returns: Nothing
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- *
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- * Notes: None
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- *
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- **********************************************************************/
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-void time_reset(void)
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-{
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- if (tdev != 0)
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- {
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- timer_ioctl(tdev, TMR_RESET, 1);
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- }
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-}
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-
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-/***********************************************************************
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- *
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- * Function: time_start
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- *
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- * Purpose: Starts system timer
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- *
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- * Processing:
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- * See function.
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- *
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- * Parameters: None
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- *
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- * Outputs: None
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- *
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- * Returns: Nothing
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- *
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- * Notes: None
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- *
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- **********************************************************************/
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-void time_start(void)
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-{
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- if (tdev != 0)
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- {
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- timer_ioctl(tdev, TMR_ENABLE, 1);
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- }
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-}
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-
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-/***********************************************************************
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- *
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- * Function: time_stop
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- *
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- * Purpose: Stops system timer
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- *
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- * Processing:
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- * See function.
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- *
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- * Parameters: None
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- *
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- * Outputs: None
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- *
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- * Returns: Nothing
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- *
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- * Notes: None
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- *
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- **********************************************************************/
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-void time_stop(void)
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-{
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- if (tdev != 0)
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- {
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- timer_ioctl(tdev, TMR_ENABLE, 0);
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- }
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-}
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-
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-/***********************************************************************
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- *
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- * Function: time_get
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- *
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- * Purpose: Returns current system time value
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- *
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- * Processing:
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- * See function.
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- *
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- * Parameters: None
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- *
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- * Outputs: None
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- *
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- * Returns: The number of ticks of the timer counter
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- *
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- * Notes: None
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- *
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- **********************************************************************/
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-UNS_64 time_get(void)
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-{
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- TMR_COUNTS_T tcounts;
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- UNS_64 ticks = 0;
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-
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- if (tdev != 0)
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- {
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- timer_ioctl(tdev, TMR_GET_COUNTS, (INT_32) &tcounts);
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-
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- /* Compute number of timer ticks */
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- ticks = (UNS_64) tcounts.count_val * 100000;
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- ticks = ticks + (UNS_64) tcounts.ps_count_val;
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- }
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-
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- return ticks;
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-}
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-
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-/***********************************************************************
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- *
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- * Function: time_get_rate
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- *
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- * Purpose:
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- * Returns base tick rate (ticks per second) of the time counter
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- *
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- * Processing:
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- * See function.
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- *
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- * Parameters: None
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- *
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- * Outputs: None
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- *
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- * Returns: The timer tick rate (in ticks per second)
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- *
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- * Notes: None
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- *
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- **********************************************************************/
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-UNS_64 time_get_rate(void)
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-{
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- return base_rate;
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-}
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-
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--- a/csps/lpc32xx/bsps/fdi3250/startup/examples/s1l/sys_mmu_cmd_group.c 2011-10-05 19:10:37.000000000 +0200
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+++ /dev/null 2012-01-01 16:39:47.918907000 +0100
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@@ -1,746 +0,0 @@
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-/***********************************************************************
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- * $Id:: sys_mmu_cmd_group.c 3430 2010-05-07 17:39:08Z usb10132 $
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- *
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- * Project: Command processor for peek, poke, dump, and fill
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- *
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- * Description:
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- * Processes commands from the command prompt
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- *
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- ***********************************************************************
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- * Software that is described herein is for illustrative purposes only
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- * which provides customers with programming information regarding the
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- * products. This software is supplied "AS IS" without any warranties.
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- * NXP Semiconductors assumes no responsibility or liability for the
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- * use of the software, conveys no license or title under any patent,
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- * copyright, or mask work right to the product. NXP Semiconductors
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- * reserves the right to make changes in the software without
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- * notification. NXP Semiconductors also make no representation or
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- * warranty that such application will be suitable for the specified
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- * use without further testing or modification.
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- **********************************************************************/
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-
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-#include "lpc_arm922t_cp15_driver.h"
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-#include "lpc_string.h"
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-#include "startup.h"
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-#include "s1l_cmds.h"
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-#include "s1l_sys_inf.h"
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-
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-/* dcache command */
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-BOOL_32 cmd_dcache(void);
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-static UNS_32 cmd_dcache_plist[] =
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-{
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- (PARSE_TYPE_STR), /* The "dcache" command */
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- (PARSE_TYPE_DEC | PARSE_TYPE_END)
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-};
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-static CMD_ROUTE_T core_dcache_cmd =
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-{
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- (UNS_8 *) "dcache",
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- cmd_dcache,
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- (UNS_8 *) "Enables, disables, or flushes data cache",
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- (UNS_8 *) "dcache [0(disable), 1(enable), 2(flush)]",
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- cmd_dcache_plist,
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- NULL
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-};
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-
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-/* icache command */
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-BOOL_32 cmd_icache(void);
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-static UNS_32 cmd_icache_plist[] =
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-{
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- (PARSE_TYPE_STR), /* The "icache" command */
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- (PARSE_TYPE_DEC | PARSE_TYPE_END)
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-};
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-static CMD_ROUTE_T core_icache_cmd =
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-{
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- (UNS_8 *) "icache",
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- cmd_icache,
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- (UNS_8 *) "Enables or disables instruction cache",
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- (UNS_8 *) "icache [0(disable), 1(enable)]",
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- cmd_icache_plist,
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- NULL
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-};
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-
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-/* inval command */
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-BOOL_32 cmd_inval(void);
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-static UNS_32 cmd_inval_plist[] =
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-{
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- (PARSE_TYPE_STR | PARSE_TYPE_END) /* The "inval" command */
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-};
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-static CMD_ROUTE_T core_inval_cmd =
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-{
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- (UNS_8 *) "inval",
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- cmd_inval,
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- (UNS_8 *) "Flushes data cache and invalidates instruction cache",
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- (UNS_8 *) "inval",
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- cmd_inval_plist,
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- NULL
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-};
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-
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-/* mmuenab command */
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-BOOL_32 cmd_mmuenab(void);
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-static UNS_32 cmd_mmuenab_plist[] =
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-{
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- (PARSE_TYPE_STR), /* The "mmuenab" command */
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- (PARSE_TYPE_DEC | PARSE_TYPE_END)
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-};
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-static CMD_ROUTE_T core_mmuenab_cmd =
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-{
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- (UNS_8 *) "mmuenab",
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- cmd_mmuenab,
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- (UNS_8 *) "Enables or disables the MMU",
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- (UNS_8 *) "mmuenab [0(disable), 1(enable)]",
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- cmd_mmuenab_plist,
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- NULL
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-};
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-
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-/* map command */
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-BOOL_32 cmd_map(void);
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-static UNS_32 cmd_map_plist[] =
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-{
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- (PARSE_TYPE_STR), /* The "map" command */
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- (PARSE_TYPE_HEX),
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- (PARSE_TYPE_HEX),
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- (PARSE_TYPE_DEC),
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- (PARSE_TYPE_DEC | PARSE_TYPE_END),
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-};
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-static CMD_ROUTE_T core_map_cmd =
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-{
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- (UNS_8 *) "map",
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- cmd_map,
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- (UNS_8 *) "Maps a range of physical address sections to virtual addresses",
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- (UNS_8 *) "map [virt hex addr][phy hex addr][sections][0(uncached), 1(cached), 2(unmap)]",
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- cmd_map_plist,
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- NULL
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-};
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-
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-/* mmuinfo command */
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-static BOOL_32 cmd_mmuinfo(void);
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-static UNS_32 cmd_mmuinfo_plist[] =
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-{
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- (PARSE_TYPE_STR | PARSE_TYPE_END) /* The "mmuinfo" command */
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-};
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-static CMD_ROUTE_T core_mmuinfo_cmd =
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-{
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- (UNS_8 *) "mmuinfo",
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- cmd_mmuinfo,
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- (UNS_8 *) "Dumps page table and MMU info",
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- (UNS_8 *) "mmuinfo",
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- cmd_mmuinfo_plist,
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- NULL
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-};
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-
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-/* MMU group */
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-static GROUP_LIST_T mmu_group =
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-{
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- (UNS_8 *) "mmu", /* mmu group */
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- (UNS_8 *) "MMU command group",
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- NULL,
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- NULL
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-};
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-
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-static UNS_8 enabled_msg [] =" enabled";
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-static UNS_8 disabled_msg [] =" disabled";
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-static UNS_8 dcache_msg[] = "Data cache";
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-static UNS_8 icache_msg[] = "Instruction cache";
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-static UNS_8 pagetab_msg[] = "Page table at address: ";
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-static UNS_8 slist_msg[] = "Type Virt Phy fl Size";
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-static UNS_8 mmu_msg [] ="MMU";
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-static UNS_8 cpage_msg[] = "Coarse page:";
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-static UNS_8 fpage_msg[] = "Fine page :";
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-static UNS_8 sect_msg[] = "Section :";
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-static UNS_8 mbytes_msg[] = "M";
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-static UNS_8 map1_err_msg[] =
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- "Error : section addresses must be aligned on a 32-bit boundary";
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-static UNS_8 map2_err_msg[] =
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- "Error : Number of sections exceeds address range of device";
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-static UNS_8 phya_msg[] = "Virtual address ";
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-static UNS_8 mapped_msg[] = " mapped to physical address ";
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-static UNS_8 unmapped_msg[] = " unmapped from physical address ";
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-static UNS_8 cached_msg[] = " (cached)";
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-static UNS_8 inval_msg[] = " invalidated";
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-static UNS_8 caches_msg [] ="Caches";
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-static UNS_8 flushed_msg[] = " flushed";
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-
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-/***********************************************************************
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- *
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- * Function: show_section
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- *
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- * Purpose: Display section information
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- *
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- * Processing:
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- * See function.
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- *
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- * Parameters:
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- * mmu_reg : MMU settings for this section
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- * virt_addr : Starting virtual address for this section
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- * segs : Number of 1M segments for this section
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- *
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- * Outputs: None
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- *
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- * Returns: Nothing
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- *
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- * Notes: None
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- *
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- **********************************************************************/
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-static void show_section(UNS_32 mmu_reg,
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- UNS_32 virt_addr,
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- UNS_32 segs)
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-{
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- UNS_8 straddr [16];
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- UNS_32 mmu_phy;
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-
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- if ((mmu_reg & ARM922T_L1D_TYPE_PG_SN_MASK) !=
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- ARM922T_L1D_TYPE_FAULT)
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- {
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- if ((mmu_reg & ARM922T_L1D_TYPE_PG_SN_MASK) ==
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- ARM922T_L1D_TYPE_CPAGE)
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- {
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- term_dat_out(cpage_msg);
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- }
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- else if ((mmu_reg & ARM922T_L1D_TYPE_PG_SN_MASK) ==
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- ARM922T_L1D_TYPE_FPAGE)
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- {
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- term_dat_out(fpage_msg);
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- }
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- else
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- {
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- term_dat_out(sect_msg);
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- }
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-
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- /* Compute virtual address */
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- str_makehex(straddr, virt_addr, 8);
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- term_dat_out(straddr);
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- term_dat_out((UNS_8 *) " ");
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-
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- /* Compute mapped physical address */
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- if ((mmu_reg & ARM922T_L1D_TYPE_PG_SN_MASK) ==
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- ARM922T_L1D_TYPE_SECTION)
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- {
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- mmu_phy = mmu_reg & 0xFFF00000;
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- }
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- else
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- {
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- /* Don't compute addresses for non-sections */
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- mmu_phy = 0;
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- }
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- str_makehex(straddr, mmu_phy, 8);
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- term_dat_out(straddr);
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- term_dat_out((UNS_8 *) " ");
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-
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- /* MMU flags */
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- if ((mmu_reg & ARM922T_L1D_BUFFERABLE) != 0)
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- {
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- term_dat_out((UNS_8 *) "b");
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- }
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- else
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- {
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- term_dat_out((UNS_8 *) " ");
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- }
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- if ((mmu_reg & ARM922T_L1D_CACHEABLE) != 0)
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- {
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- term_dat_out((UNS_8 *) "c");
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- }
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- else
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- {
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- term_dat_out((UNS_8 *) " ");
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- }
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- term_dat_out((UNS_8 *) " ");
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-
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- /* Displays used megabytes */
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- str_makedec(straddr, segs);
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- term_dat_out(straddr);
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- term_dat_out_crlf(mbytes_msg);
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- }
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-}
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-
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-/***********************************************************************
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- *
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- * Function: mmu_dumpinfo
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- *
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- * Purpose: Display MMU info
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- *
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- * Processing:
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- * Display the MMU information, including enable status, cache
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- * status, and page table.
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- *
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- * Parameters: None
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- *
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- * Outputs: None
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- *
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- * Returns: TRUE if the command was processed, otherwise FALSE
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- *
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- * Notes: None
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- *
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- **********************************************************************/
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-static BOOL_32 mmu_dumpinfo(void)
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-{
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- UNS_32 segsz, last_mmu_reg, mmu_vrt, mmu_reg, mmu_vrtsav = 0, *pt;
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- UNS_32 mlast_mmu_reg, mmmu_reg;
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- int idx;
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- UNS_8 hexaddr [16];
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-
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- term_dat_out(mmu_msg);
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- if (cp15_mmu_enabled() == FALSE)
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- {
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- term_dat_out_crlf(disabled_msg);
|
|
- }
|
|
- else
|
|
- {
|
|
- term_dat_out_crlf(enabled_msg);
|
|
-
|
|
- /* Get MMU control register word */
|
|
- mmu_reg = cp15_get_mmu_control_reg();
|
|
-
|
|
- /* Instruction cache status */
|
|
- term_dat_out(icache_msg);
|
|
- if ((mmu_reg & ARM922T_MMU_CONTROL_I) == 0)
|
|
- {
|
|
- term_dat_out_crlf(disabled_msg);
|
|
- }
|
|
- else
|
|
- {
|
|
- term_dat_out_crlf(enabled_msg);
|
|
- }
|
|
-
|
|
- /* Data cache status */
|
|
- term_dat_out(dcache_msg);
|
|
- if ((mmu_reg & ARM922T_MMU_CONTROL_C) == 0)
|
|
- {
|
|
- term_dat_out_crlf(disabled_msg);
|
|
- }
|
|
- else
|
|
- {
|
|
- term_dat_out_crlf(enabled_msg);
|
|
- }
|
|
-
|
|
- term_dat_out(pagetab_msg);
|
|
- mmu_reg = (UNS_32) cp15_get_ttb();
|
|
- str_makehex(hexaddr, mmu_reg, 8);
|
|
- term_dat_out_crlf(hexaddr);
|
|
- term_dat_out_crlf(slist_msg);
|
|
-
|
|
- /* Process MMU table - assume that the physical and
|
|
- virtual locations of table are the same */
|
|
- pt = (UNS_32 *) mmu_reg;
|
|
- mmu_vrt = 0x0;
|
|
- segsz = 0xFFFFFFFF;
|
|
- last_mmu_reg = mlast_mmu_reg = 0xFFFFFFFF;
|
|
- for (idx = 0; idx < 4096; idx++)
|
|
- {
|
|
- mmu_reg = *pt;
|
|
- mmmu_reg = (mmu_reg & (ARM922T_L1D_TYPE_PG_SN_MASK |
|
|
- ARM922T_L1D_BUFFERABLE | ARM922T_L1D_CACHEABLE));
|
|
- segsz = segsz + 1;
|
|
-
|
|
- if ((last_mmu_reg != 0xFFFFFFFF) &&
|
|
- (mlast_mmu_reg != mmmu_reg))
|
|
- {
|
|
- show_section(last_mmu_reg, mmu_vrtsav, segsz);
|
|
- segsz = 0;
|
|
- }
|
|
-
|
|
- if (mlast_mmu_reg != mmmu_reg)
|
|
- {
|
|
- mmu_vrtsav = mmu_vrt;
|
|
- last_mmu_reg = mmu_reg;
|
|
- mlast_mmu_reg = mmmu_reg;
|
|
- }
|
|
-
|
|
- pt++;
|
|
- mmu_vrt += 0x00100000;
|
|
- }
|
|
- }
|
|
-
|
|
- return TRUE;
|
|
-}
|
|
-
|
|
-/***********************************************************************
|
|
- *
|
|
- * Function: mmu_dumpmap
|
|
- *
|
|
- * Purpose: Map a virtual address range to a physical range
|
|
- *
|
|
- * Processing:
|
|
- * From the input addresses and number of sections, generate the
|
|
- * appropriate entries in the page table.
|
|
- *
|
|
- * Parameters: None
|
|
- *
|
|
- * Outputs: None
|
|
- *
|
|
- * Returns: TRUE if the command was processed, otherwise FALSE
|
|
- *
|
|
- * Notes: None
|
|
- *
|
|
- **********************************************************************/
|
|
-static BOOL_32 mmu_dumpmap(UNS_32 vrt,
|
|
- UNS_32 phy,
|
|
- UNS_32 sections,
|
|
- UNS_32 cache)
|
|
-{
|
|
- BOOL_32 processed = FALSE;
|
|
- UNS_32 mmu_phy, mmu_vrt, tmp1 = 0, tmp2, *pt;
|
|
- UNS_8 hexaddr [16];
|
|
-
|
|
- /* Verify address boundaries are sectional */
|
|
- mmu_vrt = vrt & ~ARM922T_L2D_SN_BASE_MASK;
|
|
- mmu_phy = phy & ~ARM922T_L2D_SN_BASE_MASK;
|
|
- if ((mmu_vrt != 0) || (mmu_phy != 0))
|
|
- {
|
|
- term_dat_out_crlf(map1_err_msg);
|
|
- }
|
|
- else
|
|
- {
|
|
- /* Verify that address range and section count will not
|
|
- exceed address range of device */
|
|
- tmp1 = vrt >> 20;
|
|
- tmp1 = (tmp1 + sections) - 1;
|
|
- tmp2 = phy >> 20;
|
|
- tmp2 = (tmp2 + sections) - 1;
|
|
- if ((tmp1 < 4096) && (tmp2 < 4096))
|
|
- {
|
|
- /* Good address range and good section count */
|
|
- processed = TRUE;
|
|
- }
|
|
- else
|
|
- {
|
|
- term_dat_out_crlf(map2_err_msg);
|
|
- }
|
|
- }
|
|
-
|
|
- /* Generate static part of MMU word */
|
|
- if (cache == 0)
|
|
- {
|
|
- /* Section mapped with cache disabled */
|
|
- tmp1 = ARM922T_L1D_TYPE_SECTION;
|
|
- }
|
|
- else if (cache == 1)
|
|
- {
|
|
- /* Section mapped with cache enabled */
|
|
- tmp1 = (ARM922T_L1D_BUFFERABLE | ARM922T_L1D_CACHEABLE |
|
|
- ARM922T_L1D_TYPE_SECTION);
|
|
- }
|
|
- else if (cache == 2)
|
|
- {
|
|
- /* Section unmapped */
|
|
- tmp1 = ARM922T_L1D_TYPE_FAULT;
|
|
- }
|
|
- tmp1 |= ARM922T_L1D_AP_ALL;
|
|
-
|
|
- /* Offset into page table for virtual address */
|
|
- tmp2 = (vrt >> 20);
|
|
- pt = cp15_get_ttb() + tmp2;
|
|
-
|
|
- /* Loop until all sections are complete */
|
|
- while ((sections > 0) && (processed == TRUE))
|
|
- {
|
|
- /* Add in physical address */
|
|
- tmp2 = tmp1 | (phy & ARM922T_L2D_SN_BASE_MASK);
|
|
-
|
|
- /* Save new section descriptor for virtual address */
|
|
- *pt = tmp2;
|
|
-
|
|
- /* Output message shown the map */
|
|
- term_dat_out(phya_msg);
|
|
- str_makehex(hexaddr, phy, 8);
|
|
- term_dat_out(hexaddr);
|
|
- if (cache == 2)
|
|
- {
|
|
- term_dat_out(unmapped_msg);
|
|
- }
|
|
- else
|
|
- {
|
|
- term_dat_out(mapped_msg);
|
|
- }
|
|
- str_makehex(hexaddr, vrt, 8);
|
|
- term_dat_out(hexaddr);
|
|
- if (cache == 1)
|
|
- {
|
|
- term_dat_out(cached_msg);
|
|
- }
|
|
- term_dat_out_crlf((UNS_8 *) "");
|
|
-
|
|
- /* Next section and page table entry*/
|
|
- phy += 0x00100000;
|
|
- vrt += 0x00100000;
|
|
- pt++;
|
|
- sections--;
|
|
- }
|
|
-
|
|
- return processed;
|
|
-}
|
|
-
|
|
-/***********************************************************************
|
|
- *
|
|
- * Function: cmd_mmuinfo
|
|
- *
|
|
- * Purpose: Display MMU information
|
|
- *
|
|
- * Processing:
|
|
- * See function.
|
|
- *
|
|
- * Parameters: None
|
|
- *
|
|
- * Outputs: None
|
|
- *
|
|
- * Returns: TRUE if the command was processed, otherwise FALSE
|
|
- *
|
|
- * Notes: None
|
|
- *
|
|
- **********************************************************************/
|
|
-static BOOL_32 cmd_mmuinfo(void)
|
|
-{
|
|
- mmu_dumpinfo();
|
|
-
|
|
- return TRUE;
|
|
-}
|
|
-
|
|
-/***********************************************************************
|
|
- *
|
|
- * Function: cmd_map
|
|
- *
|
|
- * Purpose: Map a physical address region to a virtual region
|
|
- *
|
|
- * Processing:
|
|
- * See function.
|
|
- *
|
|
- * Parameters: None
|
|
- *
|
|
- * Outputs: None
|
|
- *
|
|
- * Returns: TRUE if the command was processed, otherwise FALSE
|
|
- *
|
|
- * Notes: None
|
|
- *
|
|
- **********************************************************************/
|
|
-BOOL_32 cmd_map(void)
|
|
-{
|
|
- UNS_32 phy, virt, sects, ce = 0;
|
|
-
|
|
- /* Get arguments */
|
|
- virt = cmd_get_field_val(1);
|
|
- phy = cmd_get_field_val(2);
|
|
- sects = cmd_get_field_val(3);
|
|
- ce = cmd_get_field_val(4);
|
|
-
|
|
- if (ce <= 2)
|
|
- {
|
|
- mmu_dumpmap(virt, phy, sects, ce);
|
|
- }
|
|
-
|
|
- return TRUE;
|
|
-}
|
|
-
|
|
-/***********************************************************************
|
|
- *
|
|
- * Function: cmd_inval
|
|
- *
|
|
- * Purpose: MMU cache flush and invalidate
|
|
- *
|
|
- * Processing:
|
|
- * See function.
|
|
- *
|
|
- * Parameters: None
|
|
- *
|
|
- * Outputs: None
|
|
- *
|
|
- * Returns: TRUE if the command was processed, otherwise FALSE
|
|
- *
|
|
- * Notes: None
|
|
- *
|
|
- **********************************************************************/
|
|
-BOOL_32 cmd_inval(void)
|
|
-{
|
|
- dcache_flush();
|
|
- icache_inval();
|
|
- term_dat_out(caches_msg);
|
|
- term_dat_out(inval_msg);
|
|
-
|
|
- return TRUE;
|
|
-}
|
|
-
|
|
-/***********************************************************************
|
|
- *
|
|
- * Function: cmd_dcache
|
|
- *
|
|
- * Purpose: MMU data cache enable and disable
|
|
- *
|
|
- * Processing:
|
|
- * If the value passed in the parser is 1, enable the data cache,
|
|
- * otherwise disable the data cache.
|
|
- *
|
|
- * Parameters: None
|
|
- *
|
|
- * Outputs: None
|
|
- *
|
|
- * Returns: TRUE if the command was processed, otherwise FALSE
|
|
- *
|
|
- * Notes: None
|
|
- *
|
|
- **********************************************************************/
|
|
-BOOL_32 cmd_dcache(void)
|
|
-{
|
|
- UNS_32 cenable;
|
|
- UNS_8 *ppar;
|
|
-
|
|
- /* Get argument */
|
|
- cenable = cmd_get_field_val(1);
|
|
-
|
|
- switch (cenable)
|
|
- {
|
|
- case 0:
|
|
- dcache_flush();
|
|
- cp15_set_dcache(0);
|
|
- ppar = disabled_msg;
|
|
- break;
|
|
-
|
|
- case 1:
|
|
- cp15_invalidate_cache();
|
|
- cp15_set_dcache(1);
|
|
- ppar = enabled_msg;
|
|
- break;
|
|
-
|
|
- case 2:
|
|
- default:
|
|
- dcache_flush();
|
|
- ppar = flushed_msg;
|
|
- break;
|
|
- }
|
|
-
|
|
- term_dat_out(dcache_msg);
|
|
- term_dat_out_crlf(ppar);
|
|
-
|
|
- return TRUE;
|
|
-}
|
|
-
|
|
-/***********************************************************************
|
|
- *
|
|
- * Function: cmd_icache
|
|
- *
|
|
- * Purpose: MMU instruction cache enable and disable
|
|
- *
|
|
- * Processing:
|
|
- * If the value passed in the parser is 1, enable the instruction
|
|
- * cache, otherwise disable the instruction cache.
|
|
- *
|
|
- * Parameters: None
|
|
- *
|
|
- * Outputs: None
|
|
- *
|
|
- * Returns: TRUE if the command was processed, otherwise FALSE
|
|
- *
|
|
- * Notes: None
|
|
- *
|
|
- **********************************************************************/
|
|
-BOOL_32 cmd_icache(void)
|
|
-{
|
|
- UNS_32 cenable;
|
|
- UNS_8 *ppar;
|
|
-
|
|
- /* Get argument */
|
|
- cenable = cmd_get_field_val(1);
|
|
-
|
|
- if (cenable == 1)
|
|
- {
|
|
- dcache_flush();
|
|
- cp15_invalidate_cache();
|
|
- cp15_set_icache(1);
|
|
- ppar = enabled_msg;
|
|
- }
|
|
- else
|
|
- {
|
|
- cp15_set_icache(0);
|
|
- ppar = disabled_msg;
|
|
- }
|
|
-
|
|
- term_dat_out(icache_msg);
|
|
- term_dat_out_crlf(ppar);
|
|
-
|
|
- return TRUE;
|
|
-}
|
|
-
|
|
-
|
|
-/***********************************************************************
|
|
- *
|
|
- * Function: cmd_mmuenab
|
|
- *
|
|
- * Purpose: Enable or disable MMU
|
|
- *
|
|
- * Processing:
|
|
- * See function.
|
|
- *
|
|
- * Parameters: None
|
|
- *
|
|
- * Outputs: None
|
|
- *
|
|
- * Returns: TRUE if the command was processed, otherwise FALSE
|
|
- *
|
|
- * Notes: None
|
|
- *
|
|
- **********************************************************************/
|
|
-BOOL_32 cmd_mmuenab(void)
|
|
-{
|
|
- UNS_8 *ppar;
|
|
- UNS_32 cenable;
|
|
-
|
|
- term_dat_out_crlf((UNS_8 *) "Warning: Changing MMU status on "
|
|
- " cached and buffered code can cause system crashes.");
|
|
-
|
|
- /* Get argument */
|
|
- cenable = cmd_get_field_val(1);
|
|
-
|
|
- if (cenable == 1)
|
|
- {
|
|
- if ((cp15_get_mmu_control_reg() & ARM922T_MMU_CONTROL_C) != 0)
|
|
- {
|
|
- cp15_invalidate_cache();
|
|
- }
|
|
-
|
|
- cp15_set_mmu(1);
|
|
- ppar = enabled_msg;
|
|
- }
|
|
- else
|
|
- {
|
|
- cp15_dcache_flush();
|
|
- cp15_write_buffer_flush();
|
|
- cp15_invalidate_cache();
|
|
- cp15_set_mmu(0);
|
|
- ppar = disabled_msg;
|
|
- }
|
|
-
|
|
- term_dat_out(mmu_msg);
|
|
- term_dat_out_crlf(ppar);
|
|
-
|
|
- return TRUE;
|
|
-}
|
|
-
|
|
-/***********************************************************************
|
|
- *
|
|
- * Function: mmu_cmd_group_init
|
|
- *
|
|
- * Purpose: Initialize MMU command group
|
|
- *
|
|
- * Processing:
|
|
- * See function.
|
|
- *
|
|
- * Parameters: None
|
|
- *
|
|
- * Outputs: None
|
|
- *
|
|
- * Returns: Nothin
|
|
- *
|
|
- * Notes: None
|
|
- *
|
|
- **********************************************************************/
|
|
-void mmu_cmd_group_init(void)
|
|
-{
|
|
- /* Add MMU group */
|
|
- cmd_add_group(&mmu_group);
|
|
-
|
|
- /* Add commands to the MMU group */
|
|
- cmd_add_new_command(&mmu_group, &core_dcache_cmd);
|
|
- cmd_add_new_command(&mmu_group, &core_icache_cmd);
|
|
- cmd_add_new_command(&mmu_group, &core_inval_cmd);
|
|
- cmd_add_new_command(&mmu_group, &core_mmuenab_cmd);
|
|
- cmd_add_new_command(&mmu_group, &core_map_cmd);
|
|
- cmd_add_new_command(&mmu_group, &core_mmuinfo_cmd);
|
|
-}
|