c1b3b6cab0
New files missing from 58050c28.
Signed-off-by: Maxim Grigoriev <maxim2405@gmail.com>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
166 lines
8.7 KiB
Diff
166 lines
8.7 KiB
Diff
--- /dev/null 2008-09-18 06:50:54.356228028 -0700
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+++ uClibc-0.9.29/libc/sysdeps/linux/xtensa/bits/atomic.h 2008-10-04 11:40:21.000000000 -0700
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@@ -0,0 +1,162 @@
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+/*
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+ * Copyright (C) 2008 Tensilica, Inc.
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+ * Contributed by Joe Taylor <joe@tensilica.com> 2008
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+ *
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+ * This file is subject to the terms and conditions of the GNU Lesser General
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+ * Public License. See the file "COPYING.LIB" in the main directory of this
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+ * archive for more details.
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+ */
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+
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+#ifndef _XTENSA_BITS_ATOMIC_H
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+#define _XTENSA_BITS_ATOMIC_H 1
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+
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+/* Xtensa has only a 32-bit form of a store-conditional instruction,
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+ so just stub out the rest. */
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+
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+/* Atomically store NEWVAL in *MEM if *MEM is equal to OLDVAL.
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+ Return the old *MEM value. */
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+
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+#define __arch_compare_and_exchange_val_32_acq(mem, newval, oldval) \
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+ ({__typeof__(*(mem)) __tmp, __value; \
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+ __asm__ __volatile__( \
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+ "1: l32i %1, %2, 0 \n" \
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+ " bne %1, %4, 2f \n" \
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+ " wsr %1, SCOMPARE1 \n" \
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+ " mov %0, %1 \n" \
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+ " mov %1, %3 \n" \
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+ " s32c1i %1, %2, 0 \n" \
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+ " bne %0, %1, 1b \n" \
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+ "2: \n" \
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+ : "=&a" (__value), "=&a" (__tmp) \
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+ : "a" (mem), "a" (newval), "a" (oldval) \
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+ : "memory" ); \
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+ __tmp; \
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+ })
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+
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+/* Atomically store NEWVAL in *MEM if *MEM is equal to OLDVAL.
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+ Return zero if *MEM was changed or non-zero if no exchange happened. */
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+
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+#define __arch_compare_and_exchange_bool_32_acq(mem, newval, oldval) \
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+ ({__typeof__(*(mem)) __tmp, __value; \
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+ __asm__ __volatile__( \
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+ "1: l32i %0, %2, 0 \n" \
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+ " sub %1, %4, %0 \n" \
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+ " bnez %1, 2f \n" \
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+ " wsr %0, SCOMPARE1 \n" \
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+ " mov %1, %3 \n" \
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+ " s32c1i %1, %2, 0 \n" \
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+ " bne %0, %1, 1b \n" \
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+ " movi %1, 0 \n" \
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+ "2: \n" \
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+ : "=&a" (__value), "=&a" (__tmp) \
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+ : "a" (mem), "a" (newval), "a" (oldval) \
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+ : "memory" ); \
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+ __tmp != 0; \
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+ })
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+
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+/* Store NEWVALUE in *MEM and return the old value. */
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+
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+#define __arch_exchange_32_acq(mem, newval) \
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+ ({__typeof__(*(mem)) __tmp, __value; \
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+ __asm__ __volatile__( \
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+ "1: l32i %0, %2, 0 \n" \
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+ " wsr %0, SCOMPARE1 \n" \
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+ " mov %1, %3 \n" \
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+ " s32c1i %1, %2, 0 \n" \
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+ " bne %0, %1, 1b \n" \
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+ : "=&a" (__value), "=&a" (__tmp) \
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+ : "a" (mem), "a" (newval) \
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+ : "memory" ); \
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+ __tmp; \
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+ })
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+
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+/* Add VALUE to *MEM and return the old value of *MEM. */
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+
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+#define __arch_atomic_exchange_and_add_32(mem, value) \
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+ ({__typeof__(*(mem)) __tmp, __value; \
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+ __asm__ __volatile__( \
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+ "1: l32i %0, %2, 0 \n" \
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+ " wsr %0, SCOMPARE1 \n" \
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+ " add %1, %0, %3 \n" \
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+ " s32c1i %1, %2, 0 \n" \
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+ " bne %0, %1, 1b \n" \
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+ : "=&a" (__value), "=&a" (__tmp) \
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+ : "a" (mem), "a" (value) \
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+ : "memory" ); \
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+ __tmp; \
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+ })
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+
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+/* Subtract VALUE from *MEM and return the old value of *MEM. */
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+
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+#define __arch_atomic_exchange_and_sub_32(mem, value) \
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+ ({__typeof__(*(mem)) __tmp, __value; \
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+ __asm__ __volatile__( \
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+ "1: l32i %0, %2, 0 \n" \
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+ " wsr %0, SCOMPARE1 \n" \
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+ " sub %1, %0, %3 \n" \
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+ " s32c1i %1, %2, 0 \n" \
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+ " bne %0, %1, 1b \n" \
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+ : "=&a" (__value), "=&a" (__tmp) \
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+ : "a" (mem), "a" (value) \
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+ : "memory" ); \
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+ __tmp; \
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+ })
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+
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+/* Decrement *MEM if it is > 0, and return the old value. */
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+
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+#define __arch_atomic_decrement_if_positive_32(mem) \
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+ ({__typeof__(*(mem)) __tmp, __value; \
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+ __asm__ __volatile__( \
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+ "1: l32i %0, %2, 0 \n" \
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+ " blti %0, 1, 2f \n" \
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+ " wsr %0, SCOMPARE1 \n" \
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+ " addi %1, %0, -1 \n" \
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+ " s32c1i %1, %2, 0 \n" \
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+ " bne %0, %1, 1b \n" \
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+ "2: \n" \
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+ : "=&a" (__value), "=&a" (__tmp) \
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+ : "a" (mem) \
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+ : "memory" ); \
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+ __tmp; \
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+ })
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+
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+
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+/* These are the preferred public interfaces: */
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+
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+#define atomic_compare_and_exchange_val_acq(mem, newval, oldval) \
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+ ({ \
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+ if (sizeof (*mem) != 4) \
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+ abort(); \
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+ __arch_compare_and_exchange_val_32_acq(mem, newval, oldval); \
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+ })
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+
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+#define atomic_exchange_acq(mem, newval) \
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+ ({ \
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+ if (sizeof(*(mem)) != 4) \
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+ abort(); \
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+ __arch_exchange_32_acq(mem, newval); \
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+ })
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+
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+#define atomic_exchange_and_add(mem, newval) \
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+ ({ \
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+ if (sizeof(*(mem)) != 4) \
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+ abort(); \
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+ __arch_atomic_exchange_and_add_32(mem, newval); \
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+ })
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+
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+#define atomic_exchange_and_sub(mem, newval) \
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+ ({ \
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+ if (sizeof(*(mem)) != 4) \
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+ abort(); \
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+ __arch_atomic_exchange_and_sub_32(mem, newval); \
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+ })
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+
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+#define atomic_decrement_if_positive(mem) \
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+ ({ \
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+ if (sizeof(*(mem)) != 4) \
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+ abort(); \
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+ __arch_atomic_decrement_if_positive_32(mem); \
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+ })
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+
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+#endif /* _XTENSA_BITS_ATOMIC_H */
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+
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