Commit Graph

7 Commits

Author SHA1 Message Date
Yu Chien Peter Lin
3cf1f2e6cb configs/andes_ae350_45: use BR2_riscv_g
As of upstream commit cbd91e89e4
we can use the default BR2_riscv_g to select IMAFD extensions and
still be able to enable additional extensions, such as the C extension
in our cse.

Suggested-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
2023-08-24 22:31:31 +02:00
Yu Chien Peter Lin
f5573b8a04 configs/andes_ae350_45: enable RISC-V atomic extension
Let's select the RVA option as Andes 45-series CPUs support IMAFDC
extensions.

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
2023-08-22 21:12:32 +02:00
Yann E. MORIN
2423d9f16b Release 2023.08-rc2
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Merge tag '2023.08-rc2' into next

Conflicts:
  - .checkpackageignore
  - Makefile
  - board/versal/post-image.sh
  - package/sentry-cli/0001-Disable-SSL-support-for-the-curl-module.patch
      => keep version in next

  - Config.in.legacy
      => merge, introduce legacy comment for 2023.11

  - toolchain/toolchain-external/toolchain-external-bootlin/Config.in.options
      => regenerate, drop dependency on inexistant BR2_ARCH_NEEDS_GCC_AT_LEAST_14

Signed-off-by: Yann E. MORIN <yann.morin.1998@free.fr>
2023-08-21 21:36:17 +02:00
Jamie Gibbons
cbd91e89e4 arch/Config.in.riscv: allow extensions for generic
The generic extension set 'G' is realy a base with the minimal set of
extensions needed to be comfortable (but not required) to run a
linux-bassed system. Similarly, we consider the custom to be about the
custom set of features (not about a custom core implementing such a
set).

As such, we allow that a core with the G set can have futher extensions
without requiring it to be configured as a custom set.

We drop the intermediate symbols with the prompts, and move the prompts
to the previously hidden symbols, and add a prompt for the I set.

This alows one to clearly see what the generic set is about, without
having to delve into the help and hunt the list of selected symbol.

Note however that the G set implies Zicsr and Zifencei, but we have no
prompt for thos two, because in Buildroot, we assume that they are
mandatory and always present, like the I set (which they previously were
part of).

Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com>
[yann.morin.1998@free.fr:
  - drop the intermediate symbols
  - move prompt to previously hidden symbols
  - add symbol for I
  - update defconfigs
  - reword the commit log accordingly
]
Signed-off-by: Yann E. MORIN <yann.morin.1998@free.fr>
2023-08-18 23:45:45 +02:00
Yu Chien Peter Lin
4b026eb1f4 configs/andes_ae350_45: Fix build failure caused by Zicsr and Zifencei
Don't specify the ARCH_FLAGS of U-Boot, so both extensions can be
appended to -march when building w/ gcc-12.

Fixes:
- https://gitlab.com/buildroot.org/buildroot/-/jobs/4839059655

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Signed-off-by: Yann E. MORIN <yann.morin.1998@free.fr>
2023-08-14 13:49:43 +02:00
Yu Chien Peter Lin
3e708ed1f2 configs/andes_ae350_45: bump OpenSBI, U-Boot and Linux
This patch bumps following packages to the newer version:
- OpenSBI v1.1
- U-boot v2022.10
- Linux 6.0

Linux kernel is hosted on AndesTech Github which includes ethernet,
SD card, DMAC, RTC, WDT drivers support. OpenSBI is based on v1.1
with andes platfrom fdt driver.

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
2022-11-24 22:56:39 +01:00
Yu Chien Peter Lin
fc22c3ce40 board/andes/ae350: add support for Andes AE350
This patch provides defconfig and basic support for Andes
45 series RISC-V architecture on AE350 platform.

http://www.andestech.com/en/products-solutions/andeshape-platforms/ae350-axi-based-platform-pre-integrated-with-n25f-nx25f-a25-ax25/

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Signed-off-by: Alan Kao <alankao@andestech.com>
Reviewed-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Tested-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Signed-off-by: Arnout Vandecappelle (Essensium/Mind) <arnout@mind.be>
2022-03-10 21:48:16 +01:00