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package/elf2flt: fix error when building gdb for target on m68k

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Thomas reported that m68k fails to build when enabling BR2_PACKAGE_GDB.

It fails when building gdb for the target with the following error:
elf2flt: ERROR: text=0x3c826 overlaps data=0x256e0 ?

It turns out that the gdb binary has another problematic input section
(.gcc_except_table), which causes elf2flt to try to append to the .text
output section, after it has already moved on with appending sections
to the .data output section.

elf2flt cannot append to a previous output section once it has moved on
to another output section.

Update the existing elf2flt patch to also add an exception for
.gcc_except_table.

Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Signed-off-by: Niklas Cassel <niklas.cassel@wdc.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
This commit is contained in:
Niklas Cassel 2023-01-17 16:35:03 +01:00 committed by Thomas Petazzoni
parent 93e7fc3e53
commit f6f15e85b3
1 changed files with 24 additions and 23 deletions
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47
package/elf2flt/0005-elf2flt-fix-fatal-error-regression-on-m68k-xtensa-ri.patch
View File

@ -1,8 +1,7 @@
From 65ac5f9e69cfb989d970da74c41e478774d29be5 Mon Sep 17 00:00:00 2001 From a8c9f650b82109abf7aa730f298ea5182ed62613 Mon Sep 17 00:00:00 2001
From: Niklas Cassel <niklas.cassel@wdc.com> From: Niklas Cassel <niklas.cassel@wdc.com>
Date: Tue, 9 Aug 2022 21:06:05 +0200 Date: Tue, 9 Aug 2022 21:06:05 +0200
Subject: [PATCH] elf2flt: fix fatal error regression on m68k, xtensa, Subject: [PATCH] elf2flt: fix fatal error regression on m68k, xtensa, riscv64
riscv64
Commit ba379d08bb78 ("elf2flt: fix for segfault on some ARM ELFs") Commit ba379d08bb78 ("elf2flt: fix for segfault on some ARM ELFs")
changed the condition of which input sections that should be included changed the condition of which input sections that should be included
@ -12,16 +11,15 @@ to:
((a->flags & (SEC_DATA | SEC_READONLY | SEC_RELOC)) == ((a->flags & (SEC_DATA | SEC_READONLY | SEC_RELOC)) ==
(SEC_DATA | SEC_READONLY | SEC_RELOC)) (SEC_DATA | SEC_READONLY | SEC_RELOC))
On ARM, the .eh_frame input section does not have the SEC_RELOC flag On ARM, the .eh_frame input section does not have the SEC_RELOC flag set,
set, so this specific change had no effect on ARM. so on ARM, this change caused .eh_frame to move from .text to .data.
However, on e.g. m68k and riscv64, the .eh_frame input section does However, on e.g. m68k, xtensa and riscv64, the .eh_frame input section
have the SEC_RELOC flag set, which means that after commit ba379d08bb78 does have the SEC_RELOC flag set, which means that the change in
("elf2flt: fix for segfault on some ARM ELFs"), read-only relocation commit ba379d08bb78 ("elf2flt: fix for segfault on some ARM ELFs")
data sections were placed in .text output section, instead of .data caused .eh_frame to move in an opposite way, i.e. from .data to .text.
output section.
This will result in a fatal error on m68k, xtensa and riscv64: This resulted in a fatal error on m68k, xtensa and riscv64:
ERROR: text=0x3bab8 overlaps data=0x33f60 ? ERROR: text=0x3bab8 overlaps data=0x33f60 ?
This is because elf2flt cannot append to .text after .data has been This is because elf2flt cannot append to .text after .data has been
@ -36,21 +34,26 @@ to .text after .data has been appended to (which will require elf2flt
to move/relocate everything that has already been appended to .data, to move/relocate everything that has already been appended to .data,
since the virtual addresses are contiguous). since the virtual addresses are contiguous).
However, for now, add an exception for m68k, xtensa and riscv64 However, for now, add an exception for input sections which have all
(specifically for the problematic input section, .eh_frame), so that we three flags SEC_DATA, SEC_READONLY, and SEC_RELOC set, and which have a
get the same behavior as older elf2flt releases, where we put read-only name equal to a problematic input section (.eh_frame, .gcc_except_table).
relocation data in .data, which was working perfectly fine. That way, we get the same behavior as older elf2flt releases for m68k,
xtensa and riscv64, where we put read-only relocation data in .data,
which was working perfectly fine.
This exception will not change any behavior on ARM, as the .eh_frame
input section does not have flag SEC_RELOC set.
Signed-off-by: Niklas Cassel <niklas.cassel@wdc.com> Signed-off-by: Niklas Cassel <niklas.cassel@wdc.com>
--- ---
elf2flt.c | 11 +++++++++-- elf2flt.c | 9 +++++++--
1 file changed, 9 insertions(+), 2 deletions(-) 1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/elf2flt.c b/elf2flt.c diff --git a/elf2flt.c b/elf2flt.c
index 9c32f9a..a680c89 100644 index e0d7891..39d035f 100644
--- a/elf2flt.c --- a/elf2flt.c
+++ b/elf2flt.c +++ b/elf2flt.c
@@ -340,8 +340,15 @@ compare_relocs (const void *pa, const void *pb) @@ -341,8 +341,13 @@ compare_relocs (const void *pa, const void *pb)
static bool static bool
ro_reloc_data_section_should_be_in_text(asection *s) ro_reloc_data_section_should_be_in_text(asection *s)
{ {
@ -58,10 +61,8 @@ index 9c32f9a..a680c89 100644
- (SEC_DATA | SEC_READONLY | SEC_RELOC); - (SEC_DATA | SEC_READONLY | SEC_RELOC);
+ if ((s->flags & (SEC_DATA | SEC_READONLY | SEC_RELOC)) == + if ((s->flags & (SEC_DATA | SEC_READONLY | SEC_RELOC)) ==
+ (SEC_DATA | SEC_READONLY | SEC_RELOC)) { + (SEC_DATA | SEC_READONLY | SEC_RELOC)) {
+#if defined(TARGET_m68k) || defined(TARGET_riscv64) || defined(TARGET_xtensa) + if (!strcmp(".eh_frame", s->name) || !strcmp(".gcc_except_table", s->name))
+ if (!strcmp(".eh_frame", s->name))
+ return false; + return false;
+#endif
+ return true; + return true;
+ } + }
+ return false; + return false;
@ -69,5 +70,5 @@ index 9c32f9a..a680c89 100644
static uint32_t * static uint32_t *
-- --
2.37.1 2.39.0