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configs: add altera_socdk_defconfig for Altera Cyclone 5 Development Board

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This is largely the same as altera_sockit_defconfig.

It uses a fresher Linux and u-boot than SocKit. It also speeds the
serial port up to 115200.

The post-image script is generalized by adding
BR2_ROOTFS_POST_SCRIPT_ARGS and moving it up the altera directory.
Similarly, the readme is moved up and made more generic.

Signed-off-by: Charles Manning <cdhmanning@gmail.com>
Signed-off-by: Arnout Vandecappelle (Essensium/Mind) <arnout@mind.be>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
This commit is contained in:
Charles Manning 2015-07-13 00:00:31 +02:00 committed by Thomas Petazzoni
parent aec5af98ca
commit e4f787ec99
4 changed files with 48 additions and 5 deletions
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5
board/altera/sockit/post-image.sh → board/altera/post-image.sh
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@ -1,7 +1,8 @@
#!/bin/sh
# post-image.sh for SoCkit
# post-image.sh for SoCkit/SoCDK
# 2014, "Roman Diouskine" <roman.diouskine@savoirfairelinux.com>
# 2014, "Sebastien Bourdelin" <sebastien.bourdelin@savoirfairelinux.com>
# create a DTB file copy with the name expected by the u-boot config
cp -af $BINARIES_DIR/socfpga_cyclone5_sockit.dtb $BINARIES_DIR/socfpga.dtb
# Name of the DTB is passed as the second argument to the script.
cp -af $BINARIES_DIR/${2}.dtb $BINARIES_DIR/socfpga.dtb

9
board/altera/sockit/readme.txt → board/altera/readme.txt
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@ -3,7 +3,8 @@ SoCkit
Intro
=====
This is the buildroot board support for the Arrow SoCkit Evaluation Board.
This is the buildroot board support for the Arrow SoCkit Evaluation Board
and the Altera Cyclone 5 Development Board.
A good source of information is :
http://www.rocketboards.org/foswiki/Documentation/ArrowSoCKitEvaluationBoard
@ -46,6 +47,10 @@ all that is required to bring the SoCkit :
$ make altera_sockit_defconfig
and for the SoC Development Board :
$ make altera_sockdk_defconfig
Build everything
----------------
@ -63,7 +68,7 @@ After building, you should obtain this tree:
├── rootfs.ext2
├── rootfs.ext3 -> rootfs.ext2
├── rootfs.tar
├── socfpga_cyclone5_sockit.dtb
├── socfpga_cyclone5_sockit.dtb or socfpga_cyclone5_socdk.dtb
├── socfpga.dtb
├── u-boot.img
├── u-boot-spl.bin

36
configs/altera_socdk_defconfig Normal file
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@ -0,0 +1,36 @@
BR2_arm=y
BR2_cortex_a9=y
BR2_ARM_EABIHF=y
BR2_ARM_ENABLE_NEON=y
BR2_ARM_FPU_NEON=y
BR2_ARM_INSTRUCTIONS_THUMB2=y
# Lock to 3.13 headers
BR2_KERNEL_HEADERS_VERSION=y
BR2_DEFAULT_KERNEL_VERSION="3.13.5"
BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_3_13=y
BR2_ROOTFS_POST_IMAGE_SCRIPT="board/altera/post-image.sh"
BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_LINUX_KERNEL_INTREE_DTS_NAME)"
BR2_LINUX_KERNEL=y
BR2_LINUX_KERNEL_CUSTOM_GIT=y
BR2_LINUX_KERNEL_CUSTOM_REPO_URL="git://git.rocketboards.org/linux-socfpga.git"
BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="rel_socfpga-3.13_14.02.02"
BR2_LINUX_KERNEL_DEFCONFIG="socfpga"
BR2_LINUX_KERNEL_ZIMAGE=y
BR2_LINUX_KERNEL_DTS_SUPPORT=y
BR2_LINUX_KERNEL_INTREE_DTS_NAME="socfpga_cyclone5_socdk"
BR2_TARGET_ROOTFS_EXT2=y
BR2_TARGET_ROOTFS_EXT2_3=y
BR2_TARGET_UBOOT=y
BR2_TARGET_UBOOT_BOARDNAME="socfpga_cyclone5"
BR2_TARGET_UBOOT_CUSTOM_GIT=y
BR2_TARGET_UBOOT_CUSTOM_REPO_URL="git://git.rocketboards.org/u-boot-socfpga.git"
BR2_TARGET_UBOOT_CUSTOM_REPO_VERSION="rel_socfpga_v2013.01.01_14.02.02"
BR2_TARGET_UBOOT_FORMAT_IMG=y
BR2_TARGET_UBOOT_SPL=y
BR2_TARGET_UBOOT_SPL_NAME="spl/u-boot-spl.bin"

3
configs/altera_sockit_defconfig
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@ -12,7 +12,8 @@ BR2_DEFAULT_KERNEL_VERSION="3.13.5"
BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_3_13=y
BR2_TARGET_GENERIC_GETTY_BAUDRATE_57600=y
BR2_ROOTFS_POST_IMAGE_SCRIPT="board/altera/sockit/post-image.sh"
BR2_ROOTFS_POST_IMAGE_SCRIPT="board/altera/post-image.sh"
BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_LINUX_KERNEL_INTREE_DTS_NAME)"
BR2_LINUX_KERNEL=y
BR2_LINUX_KERNEL_CUSTOM_GIT=y