diff --git a/arch/Config.in.riscv b/arch/Config.in.riscv index 3dfbb4165f..d62e4ebc6c 100644 --- a/arch/Config.in.riscv +++ b/arch/Config.in.riscv @@ -1,26 +1,5 @@ # RISC-V CPU ISA extensions. -config BR2_RISCV_ISA_RVI - bool - -config BR2_RISCV_ISA_RVM - bool - -config BR2_RISCV_ISA_RVA - bool - -config BR2_RISCV_ISA_RVF - bool - -config BR2_RISCV_ISA_RVD - bool - -config BR2_RISCV_ISA_RVC - bool - -config BR2_RISCV_ISA_RVV - bool - choice prompt "Target Architecture Variant" default BR2_riscv_g @@ -41,38 +20,31 @@ config BR2_riscv_custom endchoice -if BR2_riscv_custom - comment "Instruction Set Extensions" -config BR2_RISCV_ISA_CUSTOM_RVM +config BR2_RISCV_ISA_RVI + bool "Base Integer (I)" + +config BR2_RISCV_ISA_RVM bool "Integer Multiplication and Division (M)" - select BR2_RISCV_ISA_RVM -config BR2_RISCV_ISA_CUSTOM_RVA +config BR2_RISCV_ISA_RVA bool "Atomic Instructions (A)" - select BR2_RISCV_ISA_RVA -config BR2_RISCV_ISA_CUSTOM_RVF +config BR2_RISCV_ISA_RVF bool "Single-precision Floating-point (F)" - select BR2_RISCV_ISA_RVF -config BR2_RISCV_ISA_CUSTOM_RVD +config BR2_RISCV_ISA_RVD bool "Double-precision Floating-point (D)" depends on BR2_RISCV_ISA_RVF - select BR2_RISCV_ISA_RVD -config BR2_RISCV_ISA_CUSTOM_RVC +config BR2_RISCV_ISA_RVC bool "Compressed Instructions (C)" - select BR2_RISCV_ISA_RVC -config BR2_RISCV_ISA_CUSTOM_RVV +config BR2_RISCV_ISA_RVV bool "Vector Instructions (V)" - select BR2_RISCV_ISA_RVV select BR2_ARCH_NEEDS_GCC_AT_LEAST_12 -endif - choice prompt "Target Architecture Size" default BR2_RISCV_64 diff --git a/configs/andes_ae350_45_defconfig b/configs/andes_ae350_45_defconfig index 998276635b..3b62c3615f 100644 --- a/configs/andes_ae350_45_defconfig +++ b/configs/andes_ae350_45_defconfig @@ -1,9 +1,9 @@ BR2_riscv=y BR2_riscv_custom=y -BR2_RISCV_ISA_CUSTOM_RVM=y -BR2_RISCV_ISA_CUSTOM_RVF=y -BR2_RISCV_ISA_CUSTOM_RVD=y -BR2_RISCV_ISA_CUSTOM_RVC=y +BR2_RISCV_ISA_RVM=y +BR2_RISCV_ISA_RVF=y +BR2_RISCV_ISA_RVD=y +BR2_RISCV_ISA_RVC=y BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_6_0=y BR2_GLOBAL_PATCH_DIR="board/andes/ae350/patches" BR2_TARGET_GENERIC_GETTY_PORT="ttyS0" diff --git a/configs/beaglev_defconfig b/configs/beaglev_defconfig index 42c732b973..c5ed687edc 100644 --- a/configs/beaglev_defconfig +++ b/configs/beaglev_defconfig @@ -1,10 +1,10 @@ BR2_riscv=y BR2_riscv_custom=y -BR2_RISCV_ISA_CUSTOM_RVM=y -BR2_RISCV_ISA_CUSTOM_RVA=y -BR2_RISCV_ISA_CUSTOM_RVF=y -BR2_RISCV_ISA_CUSTOM_RVD=y -BR2_RISCV_ISA_CUSTOM_RVC=y +BR2_RISCV_ISA_RVM=y +BR2_RISCV_ISA_RVA=y +BR2_RISCV_ISA_RVF=y +BR2_RISCV_ISA_RVD=y +BR2_RISCV_ISA_RVC=y BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_5_13=y BR2_ROOTFS_POST_BUILD_SCRIPT="board/beaglev/post-build.sh" BR2_ROOTFS_POST_IMAGE_SCRIPT="support/scripts/genimage.sh" diff --git a/configs/canaan_kd233_defconfig b/configs/canaan_kd233_defconfig index 77b8abf531..3335195f25 100644 --- a/configs/canaan_kd233_defconfig +++ b/configs/canaan_kd233_defconfig @@ -2,11 +2,11 @@ BR2_riscv=y BR2_RISCV_64=y BR2_riscv_custom=y -BR2_RISCV_ISA_CUSTOM_RVM=y -BR2_RISCV_ISA_CUSTOM_RVA=y -BR2_RISCV_ISA_CUSTOM_RVF=y -BR2_RISCV_ISA_CUSTOM_RVD=y -BR2_RISCV_ISA_CUSTOM_RVC=y +BR2_RISCV_ISA_RVM=y +BR2_RISCV_ISA_RVA=y +BR2_RISCV_ISA_RVF=y +BR2_RISCV_ISA_RVD=y +BR2_RISCV_ISA_RVC=y # BR2_RISCV_USE_MMU is not set BR2_RISCV_ABI_LP64D=y diff --git a/configs/hifive_unleashed_defconfig b/configs/hifive_unleashed_defconfig index 80c5e48f96..6b2e3a64b2 100644 --- a/configs/hifive_unleashed_defconfig +++ b/configs/hifive_unleashed_defconfig @@ -1,11 +1,11 @@ # Architecture BR2_riscv=y BR2_riscv_custom=y -BR2_RISCV_ISA_CUSTOM_RVM=y -BR2_RISCV_ISA_CUSTOM_RVA=y -BR2_RISCV_ISA_CUSTOM_RVF=y -BR2_RISCV_ISA_CUSTOM_RVD=y -BR2_RISCV_ISA_CUSTOM_RVC=y +BR2_RISCV_ISA_RVM=y +BR2_RISCV_ISA_RVA=y +BR2_RISCV_ISA_RVF=y +BR2_RISCV_ISA_RVD=y +BR2_RISCV_ISA_RVC=y BR2_RISCV_64=y BR2_RISCV_ABI_LP64D=y diff --git a/configs/microchip_mpfs_icicle_defconfig b/configs/microchip_mpfs_icicle_defconfig index b2568cae6a..3fec246938 100644 --- a/configs/microchip_mpfs_icicle_defconfig +++ b/configs/microchip_mpfs_icicle_defconfig @@ -1,9 +1,9 @@ BR2_riscv=y BR2_riscv_custom=y -BR2_RISCV_ISA_CUSTOM_RVM=y -BR2_RISCV_ISA_CUSTOM_RVF=y -BR2_RISCV_ISA_CUSTOM_RVD=y -BR2_RISCV_ISA_CUSTOM_RVC=y +BR2_RISCV_ISA_RVM=y +BR2_RISCV_ISA_RVF=y +BR2_RISCV_ISA_RVD=y +BR2_RISCV_ISA_RVC=y BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_6_1=y BR2_TARGET_GENERIC_HOSTNAME="mpfs_icicle" BR2_ROOTFS_POST_IMAGE_SCRIPT="board/microchip/mpfs_icicle/post-image.sh" diff --git a/configs/sipeed_maix_bit_defconfig b/configs/sipeed_maix_bit_defconfig index d73ba0266a..03ae57e1b7 100644 --- a/configs/sipeed_maix_bit_defconfig +++ b/configs/sipeed_maix_bit_defconfig @@ -2,11 +2,11 @@ BR2_riscv=y BR2_RISCV_64=y BR2_riscv_custom=y -BR2_RISCV_ISA_CUSTOM_RVM=y -BR2_RISCV_ISA_CUSTOM_RVA=y -BR2_RISCV_ISA_CUSTOM_RVF=y -BR2_RISCV_ISA_CUSTOM_RVD=y -BR2_RISCV_ISA_CUSTOM_RVC=y +BR2_RISCV_ISA_RVM=y +BR2_RISCV_ISA_RVA=y +BR2_RISCV_ISA_RVF=y +BR2_RISCV_ISA_RVD=y +BR2_RISCV_ISA_RVC=y # BR2_RISCV_USE_MMU is not set BR2_RISCV_ABI_LP64D=y diff --git a/configs/sipeed_maix_bit_sdcard_defconfig b/configs/sipeed_maix_bit_sdcard_defconfig index 34769eeca8..44d5e2b688 100644 --- a/configs/sipeed_maix_bit_sdcard_defconfig +++ b/configs/sipeed_maix_bit_sdcard_defconfig @@ -2,11 +2,11 @@ BR2_riscv=y BR2_RISCV_64=y BR2_riscv_custom=y -BR2_RISCV_ISA_CUSTOM_RVM=y -BR2_RISCV_ISA_CUSTOM_RVA=y -BR2_RISCV_ISA_CUSTOM_RVF=y -BR2_RISCV_ISA_CUSTOM_RVD=y -BR2_RISCV_ISA_CUSTOM_RVC=y +BR2_RISCV_ISA_RVM=y +BR2_RISCV_ISA_RVA=y +BR2_RISCV_ISA_RVF=y +BR2_RISCV_ISA_RVD=y +BR2_RISCV_ISA_RVC=y # BR2_RISCV_USE_MMU is not set BR2_RISCV_ABI_LP64D=y diff --git a/configs/sipeed_maix_dock_defconfig b/configs/sipeed_maix_dock_defconfig index ccb563310e..045967f589 100644 --- a/configs/sipeed_maix_dock_defconfig +++ b/configs/sipeed_maix_dock_defconfig @@ -2,11 +2,11 @@ BR2_riscv=y BR2_RISCV_64=y BR2_riscv_custom=y -BR2_RISCV_ISA_CUSTOM_RVM=y -BR2_RISCV_ISA_CUSTOM_RVA=y -BR2_RISCV_ISA_CUSTOM_RVF=y -BR2_RISCV_ISA_CUSTOM_RVD=y -BR2_RISCV_ISA_CUSTOM_RVC=y +BR2_RISCV_ISA_RVM=y +BR2_RISCV_ISA_RVA=y +BR2_RISCV_ISA_RVF=y +BR2_RISCV_ISA_RVD=y +BR2_RISCV_ISA_RVC=y # BR2_RISCV_USE_MMU is not set BR2_RISCV_ABI_LP64D=y diff --git a/configs/sipeed_maix_dock_sdcard_defconfig b/configs/sipeed_maix_dock_sdcard_defconfig index 62f6a0e0b8..7164b80e82 100644 --- a/configs/sipeed_maix_dock_sdcard_defconfig +++ b/configs/sipeed_maix_dock_sdcard_defconfig @@ -2,11 +2,11 @@ BR2_riscv=y BR2_RISCV_64=y BR2_riscv_custom=y -BR2_RISCV_ISA_CUSTOM_RVM=y -BR2_RISCV_ISA_CUSTOM_RVA=y -BR2_RISCV_ISA_CUSTOM_RVF=y -BR2_RISCV_ISA_CUSTOM_RVD=y -BR2_RISCV_ISA_CUSTOM_RVC=y +BR2_RISCV_ISA_RVM=y +BR2_RISCV_ISA_RVA=y +BR2_RISCV_ISA_RVF=y +BR2_RISCV_ISA_RVD=y +BR2_RISCV_ISA_RVC=y # BR2_RISCV_USE_MMU is not set BR2_RISCV_ABI_LP64D=y diff --git a/configs/sipeed_maix_go_defconfig b/configs/sipeed_maix_go_defconfig index c3bcf98f81..c320d19703 100644 --- a/configs/sipeed_maix_go_defconfig +++ b/configs/sipeed_maix_go_defconfig @@ -2,11 +2,11 @@ BR2_riscv=y BR2_RISCV_64=y BR2_riscv_custom=y -BR2_RISCV_ISA_CUSTOM_RVM=y -BR2_RISCV_ISA_CUSTOM_RVA=y -BR2_RISCV_ISA_CUSTOM_RVF=y -BR2_RISCV_ISA_CUSTOM_RVD=y -BR2_RISCV_ISA_CUSTOM_RVC=y +BR2_RISCV_ISA_RVM=y +BR2_RISCV_ISA_RVA=y +BR2_RISCV_ISA_RVF=y +BR2_RISCV_ISA_RVD=y +BR2_RISCV_ISA_RVC=y # BR2_RISCV_USE_MMU is not set BR2_RISCV_ABI_LP64D=y diff --git a/configs/sipeed_maix_go_sdcard_defconfig b/configs/sipeed_maix_go_sdcard_defconfig index 6c61e3aaaf..daead61c75 100644 --- a/configs/sipeed_maix_go_sdcard_defconfig +++ b/configs/sipeed_maix_go_sdcard_defconfig @@ -2,11 +2,11 @@ BR2_riscv=y BR2_RISCV_64=y BR2_riscv_custom=y -BR2_RISCV_ISA_CUSTOM_RVM=y -BR2_RISCV_ISA_CUSTOM_RVA=y -BR2_RISCV_ISA_CUSTOM_RVF=y -BR2_RISCV_ISA_CUSTOM_RVD=y -BR2_RISCV_ISA_CUSTOM_RVC=y +BR2_RISCV_ISA_RVM=y +BR2_RISCV_ISA_RVA=y +BR2_RISCV_ISA_RVF=y +BR2_RISCV_ISA_RVD=y +BR2_RISCV_ISA_RVC=y # BR2_RISCV_USE_MMU is not set BR2_RISCV_ABI_LP64D=y diff --git a/configs/sipeed_maixduino_defconfig b/configs/sipeed_maixduino_defconfig index a30596af92..ba83dd76ee 100644 --- a/configs/sipeed_maixduino_defconfig +++ b/configs/sipeed_maixduino_defconfig @@ -2,11 +2,11 @@ BR2_riscv=y BR2_RISCV_64=y BR2_riscv_custom=y -BR2_RISCV_ISA_CUSTOM_RVM=y -BR2_RISCV_ISA_CUSTOM_RVA=y -BR2_RISCV_ISA_CUSTOM_RVF=y -BR2_RISCV_ISA_CUSTOM_RVD=y -BR2_RISCV_ISA_CUSTOM_RVC=y +BR2_RISCV_ISA_RVM=y +BR2_RISCV_ISA_RVA=y +BR2_RISCV_ISA_RVF=y +BR2_RISCV_ISA_RVD=y +BR2_RISCV_ISA_RVC=y # BR2_RISCV_USE_MMU is not set BR2_RISCV_ABI_LP64D=y diff --git a/configs/sipeed_maixduino_sdcard_defconfig b/configs/sipeed_maixduino_sdcard_defconfig index da8cbe45f9..cab39d200d 100644 --- a/configs/sipeed_maixduino_sdcard_defconfig +++ b/configs/sipeed_maixduino_sdcard_defconfig @@ -2,11 +2,11 @@ BR2_riscv=y BR2_RISCV_64=y BR2_riscv_custom=y -BR2_RISCV_ISA_CUSTOM_RVM=y -BR2_RISCV_ISA_CUSTOM_RVA=y -BR2_RISCV_ISA_CUSTOM_RVF=y -BR2_RISCV_ISA_CUSTOM_RVD=y -BR2_RISCV_ISA_CUSTOM_RVC=y +BR2_RISCV_ISA_RVM=y +BR2_RISCV_ISA_RVA=y +BR2_RISCV_ISA_RVF=y +BR2_RISCV_ISA_RVD=y +BR2_RISCV_ISA_RVC=y # BR2_RISCV_USE_MMU is not set BR2_RISCV_ABI_LP64D=y