add linux-2.4.32 kernel support for the q5 board per case 0000715

2006-02-10 18:00:56 +00:00 · 2006-02-10 18:00:56 +00:00 · 88671dd358
commit 88671dd358
parent 32fa323b89
9 changed files with 621 additions and 20 deletions
--- a/target/device/jp/q5/kernel-patches-2.4.32/001-q5
+++ b/target/device/jp/q5/kernel-patches-2.4.32/001-q5
@ -0,0 +1,342 @@
+diff -Naur linux-2.4.31.org/arch/mips/Makefile linux-2.4.31/arch/mips/Makefile
+--- linux-2.4.31.org/arch/mips/Makefile	2005-01-19 09:09:26.000000000 -0500
+++ linux-2.4.31/arch/mips/Makefile	2005-09-10 17:29:44.000000000 -0400
+@@ -241,6 +241,16 @@
+ endif
+ 
+ #
+# jp-embedded Q5 board
+#
+ifdef CONFIG_MIPS_Q5
+LIBS		+= arch/mips/jp-embedded/q5/q5.o \
+		   arch/mips/au1000/common/au1000.o
+SUBDIRS		+= arch/mips/jp-embedded/q5 arch/mips/au1000/common
+LOADADDR	:= 0x80100000
+endif
+
+#
+ # Au1x00 (AMD/Alchemy) eval boards
+ #
+ ifdef CONFIG_MIPS_DB1000
+diff -Naur linux-2.4.31.org/arch/mips/au1000/common/pci_fixup.c linux-2.4.31/arch/mips/au1000/common/pci_fixup.c
+--- linux-2.4.31.org/arch/mips/au1000/common/pci_fixup.c	2005-01-19 09:09:26.000000000 -0500
+++ linux-2.4.31/arch/mips/au1000/common/pci_fixup.c	2005-09-10 17:47:29.000000000 -0400
+@@ -101,7 +101,7 @@
+ 
+ void __init pcibios_fixup_irqs(void)
+ {
+-#if defined( CONFIG_SOC_AU1500 ) || defined( CONFIG_SOC_AU1550 )
+#if defined( CONFIG_MIPS_PB1500 ) || defined( CONFIG_MIPS_PB1550 )
+ 	unsigned int slot;
+ 	unsigned char pin;
+ 	struct pci_dev *dev;
+diff -Naur linux-2.4.31.org/arch/mips/config-shared.in linux-2.4.31/arch/mips/config-shared.in
+--- linux-2.4.31.org/arch/mips/config-shared.in	2005-01-19 09:09:27.000000000 -0500
+++ linux-2.4.31/arch/mips/config-shared.in	2005-08-23 00:30:32.000000000 -0400
+@@ -31,6 +31,7 @@
+ dep_bool 'Support for Alchemy PB1500 board' CONFIG_MIPS_PB1500 $CONFIG_MIPS32
+ dep_bool 'Support for Alchemy Hydrogen3 board' CONFIG_MIPS_HYDROGEN3 $CONFIG_MIPS32
+ dep_bool 'Support for Alchemy PB1550 board' CONFIG_MIPS_PB1550 $CONFIG_MIPS32
+dep_bool 'Support for jp-embedded Q5 board' CONFIG_MIPS_Q5 $CONFIG_MIPS32
+ dep_bool 'Support for MyCable XXS1500 board' CONFIG_MIPS_XXS1500 $CONFIG_MIPS32
+ dep_bool 'Support for 4G Systems MTX-1 board' CONFIG_MIPS_MTX1 $CONFIG_MIPS32
+ dep_bool 'Support for Cogent CSB250 board' CONFIG_COGENT_CSB250 $CONFIG_MIPS32
+@@ -277,6 +278,12 @@
+    define_bool CONFIG_NONCOHERENT_IO y
+    define_bool CONFIG_PC_KEYB y
+ fi
+if [ "$CONFIG_MIPS_Q5" = "y" ]; then
+   define_bool CONFIG_SOC_AU1X00 y
+   define_bool CONFIG_SOC_AU1500 y
+   define_bool CONFIG_NONCOHERENT_IO y
+   define_bool CONFIG_PC_KEYB y
+fi
+ if [ "$CONFIG_MIPS_DB1000" = "y" ]; then
+    define_bool CONFIG_SOC_AU1X00 y
+    define_bool CONFIG_SOC_AU1000 y
+@@ -729,6 +736,7 @@
+      "$CONFIG_MIPS_PB1000" = "y" -o \
+      "$CONFIG_MIPS_PB1100" = "y" -o \
+      "$CONFIG_MIPS_PB1500" = "y" -o \
+     "$CONFIG_MIPS_Q5" = "y" -o \
+      "$CONFIG_NEC_OSPREY" = "y" -o \
+      "$CONFIG_NEC_EAGLE" = "y" -o \
+      "$CONFIG_NINO" = "y" -o \
+diff -Naur linux-2.4.31.org/arch/mips/jp-embedded/q5/Makefile linux-2.4.31/arch/mips/jp-embedded/q5/Makefile
+--- linux-2.4.31.org/arch/mips/jp-embedded/q5/Makefile	1969-12-31 19:00:00.000000000 -0500
+++ linux-2.4.31/arch/mips/jp-embedded/q5/Makefile	2005-09-10 16:46:20.000000000 -0400
+@@ -0,0 +1,9 @@
+USE_STANDARD_AS_RULE := true
+
+O_TARGET := q5.o
+
+export-objs = init.o
+
+obj-y := init.o board_setup.o irqmap.o
+
+include $(TOPDIR)/Rules.make
+diff -Naur linux-2.4.31.org/arch/mips/jp-embedded/q5/board_setup.c linux-2.4.31/arch/mips/jp-embedded/q5/board_setup.c
+--- linux-2.4.31.org/arch/mips/jp-embedded/q5/board_setup.c	1969-12-31 19:00:00.000000000 -0500
+++ linux-2.4.31/arch/mips/jp-embedded/q5/board_setup.c	2005-08-30 14:46:21.000000000 -0400
+@@ -0,0 +1,97 @@
+/*
+ *
+ * BRIEF MODULE DESCRIPTION
+ *	jp-embedded Q5 board setup.
+ *
+ * Author: jp@jp-embedded.com
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ *
+ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
+ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
+ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
+ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
+ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  You should have received a copy of the  GNU General Public License along
+ *  with this program; if not, write  to the Free Software Foundation, Inc.,
+ *  675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/sched.h>
+#include <linux/ioport.h>
+#include <linux/mm.h>
+#include <linux/console.h>
+#include <linux/mc146818rtc.h>
+#include <linux/delay.h>
+
+#include <asm/cpu.h>
+#include <asm/bootinfo.h>
+#include <asm/irq.h>
+#include <asm/keyboard.h>
+#include <asm/mipsregs.h>
+#include <asm/reboot.h>
+#include <asm/pgtable.h>
+#include <asm/au1000.h>
+#include <asm/pb1500.h>
+
+#ifdef CONFIG_USB_OHCI
+// Enable the workaround for the OHCI DoneHead
+// register corruption problem.
+#define CONFIG_AU1000_OHCI_FIX
+#endif
+
+#ifdef CONFIG_RTC
+extern struct rtc_ops pb1500_rtc_ops;
+#endif
+
+void board_reset (void)
+{
+    /* Hit BCSR.SYSTEM_CONTROL[SW_RST] obs */
+    au_writel(0x00000000, 0xAE00001C);
+}
+
+void __init board_setup(void)
+{
+	u32 pin_func;
+	u32 sys_freqctrl, sys_clksrc;
+
+#ifdef CONFIG_PCI
+	// Setup PCI bus controller
+	au_writel(0, Au1500_PCI_CMEM);
+	au_writel(0x00003fff, Au1500_CFG_BASE);
+	au_writel(0xf, Au1500_PCI_CFG);
+	au_writel(0xf0000000, Au1500_PCI_MWMASK_DEV);
+	au_writel(0, Au1500_PCI_MWBASE_REV_CCL);
+	au_writel(0x02a00356, Au1500_PCI_STATCMD);
+	au_writel(0x00003c04, Au1500_PCI_HDRTYPE);
+	au_writel(0x00000008, Au1500_PCI_MBAR);
+	au_sync();
+#endif
+
+	/* Enable sys bus clock divider when IDLE state or no bus activity. */
+	au_writel(au_readl(SYS_POWERCTRL) | (0x3 << 5), SYS_POWERCTRL);
+
+#ifdef CONFIG_RTC
+	rtc_ops = &pb1500_rtc_ops;
+	// Enable the RTC if not already enabled
+	if (!(au_readl(0xac000028) & 0x20)) {
+		printk("enabling clock ...\n");
+		au_writel((au_readl(0xac000028) | 0x20), 0xac000028);
+	}
+	// Put the clock in BCD mode
+	if (readl(0xac00002C) & 0x4) { /* reg B */
+		au_writel(au_readl(0xac00002c) & ~0x4, 0xac00002c);
+		au_sync();
+	}
+#endif
+}
+diff -Naur linux-2.4.31.org/arch/mips/jp-embedded/q5/init.c linux-2.4.31/arch/mips/jp-embedded/q5/init.c
+--- linux-2.4.31.org/arch/mips/jp-embedded/q5/init.c	1969-12-31 19:00:00.000000000 -0500
+++ linux-2.4.31/arch/mips/jp-embedded/q5/init.c	2005-09-10 16:43:21.000000000 -0400
+@@ -0,0 +1,80 @@
+/*
+ *
+ * BRIEF MODULE DESCRIPTION
+ *	jp-embedded Q5 board setup.
+ *
+ * Author: jp@jp-embedded.com
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ *
+ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
+ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
+ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
+ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
+ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  You should have received a copy of the  GNU General Public License along
+ *  with this program; if not, write  to the Free Software Foundation, Inc.,
+ *  675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/init.h>
+#include <linux/mm.h>
+#include <linux/sched.h>
+#include <linux/bootmem.h>
+#include <asm/addrspace.h>
+#include <asm/bootinfo.h>
+#include <linux/string.h>
+#include <linux/kernel.h>
+#include <linux/sched.h>
+
+int prom_argc;
+char **prom_argv, **prom_envp;
+extern void  __init prom_init_cmdline(void);
+extern char *prom_getenv(char *envname);
+void (*__wbflush) (void);
+
+void au1500_wbflush(void)
+{
+	__asm__ volatile ("sync");
+}
+
+const char *get_system_type(void)
+{
+	return "jp-embedded Q5";
+}
+
+int __init prom_init(int argc, char **argv, char **envp, int *prom_vec)
+{
+	unsigned char *memsize_str;
+	unsigned long memsize;
+
+	prom_argc = argc;
+	prom_argv = argv;
+	prom_envp = envp;
+
+	__wbflush = au1500_wbflush;
+
+        /* obs */
+	mips_machgroup = MACH_GROUP_ALCHEMY;
+	mips_machtype = MACH_PB1500;
+
+	prom_init_cmdline();
+	memsize_str = prom_getenv("memsize");
+	if (!memsize_str) {
+		memsize = 0x04000000;
+	} else {
+		memsize = simple_strtol(memsize_str, NULL, 0);
+	}
+	add_memory_region(0, memsize, BOOT_MEM_RAM);
+	return 0;
+}
+
+EXPORT_SYMBOL(__wbflush);
+diff -Naur linux-2.4.31.org/arch/mips/jp-embedded/q5/irqmap.c linux-2.4.31/arch/mips/jp-embedded/q5/irqmap.c
+--- linux-2.4.31.org/arch/mips/jp-embedded/q5/irqmap.c	1969-12-31 19:00:00.000000000 -0500
+++ linux-2.4.31/arch/mips/jp-embedded/q5/irqmap.c	2005-09-10 16:45:18.000000000 -0400
+@@ -0,0 +1,61 @@
+/*
+ *
+ * BRIEF MODULE DESCRIPTION
+ *	jp-embedded Q5 board setup.
+ *
+ * Author: jp@jp-embedded.com
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ *
+ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
+ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
+ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
+ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
+ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  You should have received a copy of the  GNU General Public License along
+ *  with this program; if not, write  to the Free Software Foundation, Inc.,
+ *  675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/errno.h>
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <linux/kernel_stat.h>
+#include <linux/module.h>
+#include <linux/signal.h>
+#include <linux/sched.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/ioport.h>
+#include <linux/timex.h>
+#include <linux/slab.h>
+#include <linux/random.h>
+#include <linux/delay.h>
+
+#include <asm/bitops.h>
+#include <asm/bootinfo.h>
+#include <asm/io.h>
+#include <asm/mipsregs.h>
+#include <asm/system.h>
+#include <asm/au1000.h>
+
+au1xxx_irq_map_t au1xxx_irq_map[] = {
+	{ AU1500_GPIO_201, INTC_INT_LOW_LEVEL, 0 },
+	{ AU1500_GPIO_202, INTC_INT_LOW_LEVEL, 0 },
+	{ AU1500_GPIO_203, INTC_INT_LOW_LEVEL, 0 },
+	{ AU1500_GPIO_204, INTC_INT_HIGH_LEVEL, 0},
+	{ AU1500_GPIO_205, INTC_INT_LOW_LEVEL, 0 },
+	{ AU1500_GPIO_206, INTC_INT_FALL_EDGE, 0 },
+	{ AU1500_GPIO_207, INTC_INT_LOW_LEVEL, 0 },
+};
+
+int au1xxx_nr_irqs = sizeof(au1xxx_irq_map)/sizeof(au1xxx_irq_map_t);
+
+--- linux-2.4.31.org/Documentation/Configure.help	2005-04-03 21:42:19.000000000 -0400
+++ linux-2.4.31/Documentation/Configure.help	2005-09-10 18:50:14.340000000 -0400
+@@ -2197,6 +2197,12 @@
+   MIPS-32-based Baget embedded system.  This chipset is better known
+   via the NE2100 cards.
+ 
+jp-embedded Q5 support
+CONFIG_MIPS_Q5
+  This enables support for jp-embedded's MIPS based boards. The
+  boards uses the AU1500 cpu. For more information about these
+  boards, see <http://www.jp-embedded.com/>.
+
+ Support for DECstations
+ CONFIG_DECSTATION
+   This enables support for DEC's MIPS based workstations.  For details
--- a/target/device/jp/q5/kernel-patches-2.4.32/005-dp83847
+++ b/target/device/jp/q5/kernel-patches-2.4.32/005-dp83847
@ -0,0 +1,162 @@
+diff -Naur linux-2.4.31.org/drivers/net/au1000_eth.c linux-2.4.31/drivers/net/au1000_eth.c
+--- linux-2.4.31.org/drivers/net/au1000_eth.c	2005-01-19 09:09:56.000000000 -0500
+++ linux-2.4.31/drivers/net/au1000_eth.c	2005-08-22 12:24:31.000000000 -0400
+@@ -595,6 +595,97 @@
+ 	return 0;
+ }
+ 
+int ns_83847_reset(struct net_device *dev, int phy_addr)
+ {
+       s16 mii_control, timeout;
+
+ //    printk("ns_reset\n");
+       mii_control = mdio_read(dev, phy_addr, MII_CONTROL);
+       mdio_write(dev, phy_addr, MII_CONTROL, mii_control | MII_CNTL_RESET);
+       mdelay(1);
+       for (timeout = 100; timeout > 0; --timeout) {
+               mii_control = mdio_read(dev, phy_addr, MII_CONTROL);
+               if ((mii_control & MII_CNTL_RESET) == 0)
+                       break;
+               mdelay(1);
+       }
+       if (mii_control & MII_CNTL_RESET) {
+               printk(KERN_ERR "%s PHY reset timeout !\n", dev->name);
+               return -1;
+       }
+       return 0;
+ }
+
+int ns_83847_init(struct net_device *dev, int phy_addr)
+ {
+      s16 data;
+ //    printk("ns_init\n");
+
+       /* Stop auto-negotiation */
+ //    data = mdio_read(dev, phy_addr, MII_CONTROL);
+ //    mdio_write(dev, phy_addr, MII_CONTROL, data & ~MII_CNTL_AUTO);
+ //    mdio_write(dev, phy_addr,    0, 0x0000);
+       mdio_write(dev, phy_addr, MII_CONTROL, MII_CNTL_F100 /* | MII_CNTL_FDX */);
+
+       /* Set advertisement to 10/100 and Half/Full duplex (full capabilities) */
+       data = mdio_read(dev, phy_addr, MII_ANADV);
+       /* obs PAUSE bit */
+       data |= MII_NWAY_TX | MII_NWAY_TX_FDX | MII_NWAY_T_FDX | MII_NWAY_T; /* MII_NWAY_T4 not sopported */ ;
+       mdio_write(dev, phy_addr, MII_ANADV, data);
+
+       /* Bypass led stretching? */
+       data = mdio_read(dev, phy_addr, MII_NS_PHYCTRL);
+       data |= MII_NS_PHYCTRL_BP_STRETCH;
+       mdio_write(dev, phy_addr, MII_NS_PHYCTRL, data);
+
+       /* Restart auto-negotiation */
+       data = mdio_read(dev, phy_addr, MII_CONTROL);
+       data |= MII_CNTL_RST_AUTO | MII_CNTL_AUTO;
+       mdio_write(dev, phy_addr, MII_CONTROL, data);
+
+       return 0;
+ }
+
+int ns_83847_status(struct net_device *dev, int phy_addr, u16 *link, u16 *speed)
+ {
+       u16 mii_data;
+       struct au1000_private *aup;
+
+       if (!dev) {
+               printk(KERN_ERR "ns_83847_status error: NULL dev\n");
+               return -1;
+       }
+       aup = (struct au1000_private *) dev->priv;
+
+       mii_data = mdio_read(dev, aup->phy_addr, MII_STATUS);
+ //    printk("ns_status: %04x\n", mii_data);
+       if (mii_data & MII_STAT_LINK) {
+               *link = 1;
+               mii_data = mdio_read(dev, aup->phy_addr, MII_NS_PHYSTS);
+               if (mii_data & MII_NS_PHYSTS_SPEED_10) {
+                       *speed = IF_PORT_10BASET;
+                       dev->if_port = IF_PORT_10BASET;
+               }
+               else  {
+                       if (mii_data & MII_NS_PHYSTS_DUPLEX_FULL) {
+                               *speed = IF_PORT_100BASEFX;
+                               dev->if_port = IF_PORT_100BASEFX;
+                       }
+                       else {
+                               *speed = IF_PORT_100BASETX;
+                               dev->if_port = IF_PORT_100BASETX;
+                       }
+               }
+
+       }
+       else {
+               *link = 0;
+               *speed = 0;
+               dev->if_port = IF_PORT_UNKNOWN;
+       }
+       return 0;
+ }
+
+ #ifdef CONFIG_MIPS_BOSPORUS
+ int stub_init(struct net_device *dev, int phy_addr)
+ {
+@@ -620,6 +711,12 @@
+ }
+ #endif
+ 
+struct phy_ops ns_83847_ops = {
+       ns_83847_init,
+       ns_83847_reset,
+       ns_83847_status,
+};
+
+ struct phy_ops bcm_5201_ops = {
+ 	bcm_5201_init,
+ 	bcm_5201_reset,
+@@ -679,6 +776,7 @@
+ 	{"LSI 80227 10/100 BaseT PHY",0x0016,0xf840, &lsi_80227_ops,0},
+ 	{"Intel LXT971A Dual Speed PHY",0x0013,0x78e2, &lxt971a_ops,0},
+ 	{"Kendin KS8995M 10/100 BaseT PHY",0x0022,0x1450, &ks8995m_ops,0},
+	{"Natsemi DP83847 PHY", 0x2000, 0x5c30, &ns_83847_ops },
+ #ifdef CONFIG_MIPS_BOSPORUS
+ 	{"Stub", 0x1234, 0x5678, &stub_ops },
+ #endif
+@@ -872,6 +970,8 @@
+ 			}
+ 		}
+ 	}
+	printk(KERN_ERR "%s: Au1x No MII transceivers found!\n", dev->name);
+	return -1;
+ found:
+ 
+ #ifdef CONFIG_MIPS_BOSPORUS
+diff -Naur linux-2.4.31.org/drivers/net/au1000_eth.h linux-2.4.31/drivers/net/au1000_eth.h
+--- linux-2.4.31.org/drivers/net/au1000_eth.h	2004-02-18 08:36:31.000000000 -0500
+++ linux-2.4.31/drivers/net/au1000_eth.h	2005-08-22 12:31:37.000000000 -0400
+@@ -86,6 +86,27 @@
+ #define MII_STAT_CAN_TX_FDX 0x4000
+ #define	MII_STAT_CAN_T4     0x8000
+ 
+/* mii registers for NS 83847 */
+#define MII_NS_PHYSTS   0x10
+#define MII_NS_FCSCR    0x14
+#define MII_NS_RECR     0x15
+#define MII_NS_PCSR     0x16
+#define MII_NS_PHYCTRL  0x19
+#define MII_NS_10BTSCR  0x1a
+#define MII_NS_CDCTRL   0x1b
+
+/* MII_NS_PHYSTS bits */
+#define MII_NS_PHYSTS_LINK            (1)
+#define MII_NS_PHYSTS_SPEED_10        (1<<1)
+#define MII_NS_PHYSTS_DUPLEX_FULL     (1<<2)
+
+/* MII_NS_PHYCTRL bits */
+#define MII_NS_PHYCTRL_BP_STRETCH     (1<<8)
+
+/* MII_NS_CDCTRL bits */
+#define MII_NS_CDCTRL_CD_ENABLE       (1<<15)
+#define MII_NS_CDCTRL_RISETIME        (1<<11)
+#define MII_NS_CDCTRL_FALLTIME        (1<<9)
+ 
+ #define		MII_ID1_OUI_LO		0xFC00	/* low bits of OUI mask */
+ #define		MII_ID1_MODEL		0x03F0	/* model number */
--- a/target/device/jp/q5/kernel-patches-2.4.32/006-cfi
+++ b/target/device/jp/q5/kernel-patches-2.4.32/006-cfi
@ -0,0 +1,27 @@
+diff -Naur linux-2.4.31.org/drivers/mtd/chips/cfi_cmdset_0002.c linux-2.4.31/drivers/mtd/chips/cfi_cmdset_0002.c
+--- linux-2.4.31.org/drivers/mtd/chips/cfi_cmdset_0002.c	2004-11-17 06:54:21.000000000 -0500
+++ linux-2.4.31/drivers/mtd/chips/cfi_cmdset_0002.c	2005-08-22 12:14:17.000000000 -0400
+@@ -510,7 +510,7 @@
+ 	   or tells us why it failed. */        
+ 	dq6 = CMD(1<<6);
+ 	dq5 = CMD(1<<5);
+-	timeo = jiffies + (HZ/1000); /* setting timeout to 1ms for now */
+	timeo = jiffies + (HZ); /* setting timeout to 1s for now */
+ 		
+ 	oldstatus = cfi_read(map, adr);
+ 	status = cfi_read(map, adr);
+@@ -950,12 +950,8 @@
+ 		    oldstatus   = cfi_read( map, adr );
+ 		    status      = cfi_read( map, adr );
+ 		    
+-		    if( ( oldstatus & 0x00FF ) == ( status & 0x00FF ) )
+		    if( ( oldstatus & 0x00FF ) != ( status & 0x00FF ) )
+ 		    {
+-                printk( "Warning: DQ5 raised while erase operation was in progress, but erase completed OK\n" ); 		    
+-		    } 			
+-			else
+-            {
+ 			    /* DQ5 is active so we can do a reset and stop the erase */
+ 				cfi_write(map, CMD(0xF0), chip->start);
+                 printk( KERN_WARNING "Internal flash device timeout occured or write operation was performed while flash was erasing\n" );
+
--- a/target/device/jp/q5/kernel-patches-2.4.32/007-au1000
+++ b/target/device/jp/q5/kernel-patches-2.4.32/007-au1000
@ -0,0 +1,13 @@
+--- linux-2.4.32_old/arch/mips/au1000/common/clocks.c	2005-01-19 15:09:26.000000000 +0100
+++ linux-2.4.32/arch/mips/au1000/common/clocks.c	2006-01-27 13:51:39.000000000 +0100
+@@ -85,9 +85,7 @@
+ 		lcd_clock = sys_busclk / 4;
+ 
+ 	if (lcd_clock > 50000) /* Epson MAX */
+-			printk(__FUNCTION__
+-			       ": warning: LCD clock too high (%d KHz)\n",
+-			       lcd_clock);
+			printk("warning: LCD clock too high (%d KHz)\n", lcd_clock);
+ }
+ 
+ unsigned int get_au1x00_lcd_clock(void)
--- a/target/device/jp/q5/kernel-patches-2.4.32/008-wbflush
+++ b/target/device/jp/q5/kernel-patches-2.4.32/008-wbflush
@ -0,0 +1,14 @@
+--- linux-2.4.32_old/include/asm-mips/wbflush.h	2006-01-26 15:16:14.000000000 +0100
+++ linux-2.4.32/include/asm-mips/wbflush.h	2006-01-27 15:25:54.030500656 +0100
+@@ -15,9 +15,8 @@
+ 
+ #ifdef CONFIG_CPU_HAS_WB
+ 
+-extern void (*__wbflush)(void);
+-extern void wbflush_setup(void);
+-
+#define __wbflush() { __asm__ volatile ("sync"); }
+ 
+ #define wbflush()			\
+ 	do {				\
+ 		__sync();		\
--- a/target/device/jp/q5/kernel-patches-2.4.32/100-version
+++ b/target/device/jp/q5/kernel-patches-2.4.32/100-version
@ -0,0 +1,11 @@
+--- linux/Makefile.orig	2004-08-18 14:17:14.000000000 -0600
+++ linux/Makefile	2004-08-18 14:17:54.000000000 -0600
+@@ -1,7 +1,7 @@
+ VERSION = 2
+ PATCHLEVEL = 4
+ SUBLEVEL = 32
+-EXTRAVERSION =
+EXTRAVERSION =-q5
+ 
+ KERNELRELEASE=$(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION)
+ 
--- a/target/device/jp/q5/linux.config
+++ b/target/device/jp/q5/linux.config
@ -1,5 +1,5 @@
 #
-# Automatically generated by make menuconfig: don't edit
+# Automatically generated make config: don't edit
 #
 CONFIG_MIPS=y
 CONFIG_MIPS32=y
@ -26,11 +26,13 @@ CONFIG_MODULES=y
 # CONFIG_MIPS_DB1000 is not set
 # CONFIG_MIPS_DB1100 is not set
 # CONFIG_MIPS_DB1500 is not set
+# CONFIG_MIPS_DB1550 is not set
 # CONFIG_MIPS_PB1000 is not set
 # CONFIG_MIPS_PB1100 is not set
-CONFIG_MIPS_PB1500=y
+# CONFIG_MIPS_PB1500 is not set
 # CONFIG_MIPS_HYDROGEN3 is not set
 # CONFIG_MIPS_PB1550 is not set
+CONFIG_MIPS_Q5=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_MIPS_MTX1 is not set
 # CONFIG_COGENT_CSB250 is not set
@ -53,6 +55,8 @@ CONFIG_MIPS_PB1500=y
 # CONFIG_MOMENCO_OCELOT_G is not set
 # CONFIG_MOMENCO_OCELOT_C is not set
 # CONFIG_MOMENCO_JAGUAR_ATX is not set
+# CONFIG_PMC_BIG_SUR is not set
+# CONFIG_PMC_STRETCH is not set
 # CONFIG_PMC_YOSEMITE is not set
 # CONFIG_DDB5074 is not set
 # CONFIG_DDB5476 is not set
@ -76,10 +80,6 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
 # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
 CONFIG_SOC_AU1X00=y
 CONFIG_SOC_AU1500=y
-CONFIG_NEW_TIME_C=y
-CONFIG_PCI=y
-CONFIG_NEW_PCI=y
-CONFIG_PCI_AUTO=y
 CONFIG_NONCOHERENT_IO=y
 CONFIG_PC_KEYB=y
 # CONFIG_MIPS_AU1000 is not set
@ -120,8 +120,12 @@ CONFIG_CPU_HAS_SYNC=y
 # General setup
 #
 CONFIG_CPU_LITTLE_ENDIAN=y
+# CONFIG_BUILD_ELF64 is not set
 CONFIG_NET=y
-CONFIG_PCI_NAMES=y
+CONFIG_PCI=y
+CONFIG_PCI_NEW=y
+CONFIG_PCI_AUTO=y
+# CONFIG_PCI_NAMES is not set
 # CONFIG_ISA is not set
 # CONFIG_TC is not set
 # CONFIG_MCA is not set
@ -139,6 +143,10 @@ CONFIG_HOTPLUG=y
 # CONFIG_HOTPLUG_PCI is not set
 # CONFIG_HOTPLUG_PCI_COMPAQ is not set
 # CONFIG_HOTPLUG_PCI_COMPAQ_NVRAM is not set
+# CONFIG_HOTPLUG_PCI_SHPC is not set
+# CONFIG_HOTPLUG_PCI_SHPC_POLL_EVENT_MODE is not set
+# CONFIG_HOTPLUG_PCI_PCIE is not set
+# CONFIG_HOTPLUG_PCI_PCIE_POLL_EVENT_MODE is not set
 CONFIG_SYSVIPC=y
 # CONFIG_BSD_PROCESS_ACCT is not set
 CONFIG_SYSCTL=y
@ -152,6 +160,7 @@ CONFIG_BINFMT_ELF=y
 # CONFIG_BINFMT_ELF32 is not set
 # CONFIG_BINFMT_MISC is not set
 # CONFIG_OOM_KILLER is not set
+# CONFIG_CMDLINE_BOOL is not set
 # CONFIG_PM is not set

 #
@ -163,6 +172,10 @@ CONFIG_MTD_PARTITIONS=y
 CONFIG_MTD_CONCAT=y
 # CONFIG_MTD_REDBOOT_PARTS is not set
 # CONFIG_MTD_CMDLINE_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
 CONFIG_MTD_CHAR=y
 CONFIG_MTD_BLOCK=y
 # CONFIG_FTL is not set
@ -202,8 +215,8 @@ CONFIG_MTD_ROM=y
 # Mapping drivers for chip access
 #
 CONFIG_MTD_PHYSMAP=y
-CONFIG_MTD_PHYSMAP_START=18000000
-CONFIG_MTD_PHYSMAP_LEN=2000000
+CONFIG_MTD_PHYSMAP_START=0x18000000
+CONFIG_MTD_PHYSMAP_LEN=0x2000000
 CONFIG_MTD_PHYSMAP_BUSWIDTH=4
 # CONFIG_MTD_PB1000 is not set
 # CONFIG_MTD_PB1500 is not set
@ -221,6 +234,10 @@ CONFIG_MTD_PHYSMAP_BUSWIDTH=4
 # CONFIG_MTD_SLRAM is not set
 # CONFIG_MTD_MTDRAM is not set
 # CONFIG_MTD_BLKMTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
 # CONFIG_MTD_DOC1000 is not set
 # CONFIG_MTD_DOC2000 is not set
 # CONFIG_MTD_DOC2001 is not set
@ -254,6 +271,7 @@ CONFIG_MTD_PHYSMAP_BUSWIDTH=4
 # CONFIG_CISS_MONITOR_THREAD is not set
 # CONFIG_BLK_DEV_DAC960 is not set
 # CONFIG_BLK_DEV_UMEM is not set
+# CONFIG_BLK_DEV_SX8 is not set
 CONFIG_BLK_DEV_LOOP=y
 # CONFIG_BLK_DEV_NBD is not set
 # CONFIG_BLK_DEV_RAM is not set
@ -338,7 +356,6 @@ CONFIG_IP_NF_NAT=m
 CONFIG_IP_NF_NAT_NEEDED=y
 CONFIG_IP_NF_TARGET_MASQUERADE=m
 CONFIG_IP_NF_TARGET_REDIRECT=m
-# CONFIG_IP_NF_NAT_LOCAL is not set
 # CONFIG_IP_NF_NAT_SNMP_BASIC is not set
 CONFIG_IP_NF_NAT_FTP=m
 CONFIG_IP_NF_MANGLE=m
@ -364,13 +381,12 @@ CONFIG_IP_NF_TARGET_LOG=m
 # CONFIG_IP_SCTP is not set
 # CONFIG_ATM is not set
 CONFIG_VLAN_8021Q=y
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set

 #
-# Appletalk devices
+#  
 #
-# CONFIG_DEV_APPLETALK is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
 # CONFIG_DECNET is not set
 CONFIG_BRIDGE=m
 # CONFIG_X25 is not set
@ -396,7 +412,7 @@ CONFIG_NET_SCH_RED=m
 # CONFIG_NET_SCH_TEQL is not set
 CONFIG_NET_SCH_TBF=m
 CONFIG_NET_SCH_GRED=m
-# CONFIG_NET_SCH_DELAY is not set
+# CONFIG_NET_SCH_NETEM is not set
 CONFIG_NET_SCH_DSMARK=m
 CONFIG_NET_SCH_INGRESS=m
 CONFIG_NET_QOS=y
@ -573,6 +589,11 @@ CONFIG_AIRO=m
 # CONFIG_PLX_HERMES is not set
 # CONFIG_TMD_HERMES is not set
 # CONFIG_PCI_HERMES is not set
+
+#
+# Prism54 PCI/PCMCIA GT/Duette Driver - 802.11(a/b/g)
+#
+CONFIG_PRISM54=m
 CONFIG_NET_WIRELESS=y

 #
@ -665,6 +686,14 @@ CONFIG_UNIX98_PTY_COUNT=256
 # Joysticks
 #
 # CONFIG_INPUT_GAMEPORT is not set
+
+#
+# Input core support is needed for gameports
+#
+
+#
+# Input core support is needed for joysticks
+#
 # CONFIG_QIC02_TAPE is not set
 # CONFIG_IPMI_HANDLER is not set
 # CONFIG_IPMI_PANIC_EVENT is not set
@ -681,7 +710,6 @@ CONFIG_UNIX98_PTY_COUNT=256
 # CONFIG_AMD_PM768 is not set
 # CONFIG_NVRAM is not set
 # CONFIG_RTC is not set
-# CONFIG_MIPS_RTC is not set
 # CONFIG_DTLK is not set
 # CONFIG_R3964 is not set
 # CONFIG_APPLICOM is not set
--- a/target/device/jp/q5/linux.mk
+++ b/target/device/jp/q5/linux.mk
@ -22,7 +22,7 @@
 ifneq ($(filter $(TARGETS),linux),)

 # Base version of Linux kernel that we need to download
-DOWNLOAD_LINUX_VERSION=2.4.26
+DOWNLOAD_LINUX_VERSION=2.4.32
 # Version of Linux kernel AFTER applying all patches
 LINUX_VERSION=$(DOWNLOAD_LINUX_VERSION)-q5

@ -53,7 +53,6 @@ LINUX_SITE=http://www.kernel.org/pub/linux/kernel/v2.4
 # Used by pcmcia-cs and others
 LINUX_SOURCE_DIR=$(LINUX_DIR)

-
 $(DL_DIR)/$(LINUX_SOURCE):
 	-mkdir -p $(DL_DIR)
 	$(WGET) -P $(DL_DIR) $(LINUX_SITE)/$(LINUX_SOURCE)
@ -67,6 +66,8 @@ ifneq ($(DOWNLOAD_LINUX_VERSION),$(LINUX_VERSION))
 	mv -f $(BUILD_DIR)/linux-$(DOWNLOAD_LINUX_VERSION) $(BUILD_DIR)/linux-$(LINUX_VERSION)
 endif
 	toolchain/patch-kernel.sh $(LINUX_DIR) $(LINUX_PATCH_DIR)
+	#New versions of binutils does not have -mcpu, but -mtune. -march is not needed because -mips2 is used
+	mv $(LINUX_DIR)/arch/mips/Makefile $(LINUX_DIR)/arch/mips/Makefile.org && sed 's/-mcpu/-mtune/g' < $(LINUX_DIR)/arch/mips/Makefile.org > $(LINUX_DIR)/arch/mips/Makefile
 	touch $(LINUX_DIR)/.unpacked

 $(LINUX_KCONFIG):
--- a/target/device/jp/q5/uClibc.config.mipsel
+++ b/target/device/jp/q5/uClibc.config.mipsel
@ -43,7 +43,7 @@ ARCH_HAS_MMU=y
 UCLIBC_HAS_FLOATS=y
 HAS_FPU=y
 DO_C99_MATH=y
-KERNEL_SOURCE="/home/jp/buildroot_jp/build_test/toolchain_build_mipsel/linux"
+KERNEL_SOURCE="/mnt/storage1/jp/cvs/q5/sw/build/buildroot/toolchain_build_mipsel/linux"
 C_SYMBOL_PREFIX=""
 HAVE_DOT_CONFIG=y

@ -61,6 +61,7 @@ LDSO_LDD_SUPPORT=y
 LDSO_CACHE_SUPPORT=y
 # LDSO_PRELOAD_FILE_SUPPORT is not set
 LDSO_BASE_FILENAME="ld.so"
+LDSO_RUNPATH=y
 # DL_FINI_CRT_COMPAT is not set
 UCLIBC_CTOR_DTOR=y
 # HAS_NO_THREADS is not set
@ -115,6 +116,7 @@ UCLIBC_HAS_STDIO_BUFSIZ_4096=y
 UCLIBC_HAS_STDIO_BUILTIN_BUFFER_NONE=y
 # UCLIBC_HAS_STDIO_BUILTIN_BUFFER_4 is not set
 # UCLIBC_HAS_STDIO_BUILTIN_BUFFER_8 is not set
+# UCLIBC_HAS_STDIO_SHUTDOWN_ON_ABORT is not set
 UCLIBC_HAS_STDIO_GETC_MACRO=y
 UCLIBC_HAS_STDIO_PUTC_MACRO=y
 UCLIBC_HAS_STDIO_AUTO_RW_TRANSITION=y
@ -151,8 +153,9 @@ DEVEL_PREFIX="/usr/"
 #
 # uClibc development/debugging options
 #
-CROSS_COMPILER_PREFIX=""
+CROSS_COMPILER_PREFIX="/mnt/storage1/jp/cvs/q5/sw/build/buildroot/build_mipsel/staging_dir/bin/mipsel-linux-uclibc-"
 # DODEBUG is not set
+# DODEBUG_PT is not set
 # DOASSERTS is not set
 # SUPPORT_LD_DEBUG is not set
 # SUPPORT_LD_DEBUG_EARLY is not set