From 82879ada2bb997dd3a6ff8541fe1a9169a832dba Mon Sep 17 00:00:00 2001 From: Thomas Petazzoni Date: Tue, 25 Jan 2022 00:01:09 +0100 Subject: [PATCH] toolchain/toolchain-external/toolchain-external-bootlin: regenerate with AVX512 condition for x86-64-v4 toolchain Signed-off-by: Thomas Petazzoni Signed-off-by: Yann E. MORIN --- .../toolchain-external-bootlin/Config.in.options | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/toolchain/toolchain-external/toolchain-external-bootlin/Config.in.options b/toolchain/toolchain-external/toolchain-external-bootlin/Config.in.options index 42cad21d71..4b4404620c 100644 --- a/toolchain/toolchain-external/toolchain-external-bootlin/Config.in.options +++ b/toolchain/toolchain-external/toolchain-external-bootlin/Config.in.options @@ -40,7 +40,7 @@ config BR2_TOOLCHAIN_EXTERNAL_BOOTLIN_ARCH_SUPPORTS default y if BR2_x86_64 && BR2_X86_CPU_HAS_MMX && BR2_X86_CPU_HAS_SSE && BR2_X86_CPU_HAS_SSE2 default y if BR2_x86_64 && BR2_X86_CPU_HAS_MMX && BR2_X86_CPU_HAS_SSE && BR2_X86_CPU_HAS_SSE2 && BR2_X86_CPU_HAS_SSE3 && BR2_X86_CPU_HAS_SSSE3 && BR2_X86_CPU_HAS_SSE4 && BR2_X86_CPU_HAS_SSE42 default y if BR2_x86_64 && BR2_X86_CPU_HAS_MMX && BR2_X86_CPU_HAS_SSE && BR2_X86_CPU_HAS_SSE2 && BR2_X86_CPU_HAS_SSE3 && BR2_X86_CPU_HAS_SSSE3 && BR2_X86_CPU_HAS_SSE4 && BR2_X86_CPU_HAS_SSE42 && BR2_X86_CPU_HAS_AVX && BR2_X86_CPU_HAS_AVX2 - default y if BR2_x86_64 && BR2_X86_CPU_HAS_MMX && BR2_X86_CPU_HAS_SSE && BR2_X86_CPU_HAS_SSE2 && BR2_X86_CPU_HAS_SSE3 && BR2_X86_CPU_HAS_SSSE3 && BR2_X86_CPU_HAS_SSE4 && BR2_X86_CPU_HAS_SSE42 && BR2_X86_CPU_HAS_AVX && BR2_X86_CPU_HAS_AVX2 + default y if BR2_x86_64 && BR2_X86_CPU_HAS_MMX && BR2_X86_CPU_HAS_SSE && BR2_X86_CPU_HAS_SSE2 && BR2_X86_CPU_HAS_SSE3 && BR2_X86_CPU_HAS_SSSE3 && BR2_X86_CPU_HAS_SSE4 && BR2_X86_CPU_HAS_SSE42 && BR2_X86_CPU_HAS_AVX && BR2_X86_CPU_HAS_AVX2 && BR2_X86_CPU_HAS_AVX512 default y if BR2_x86_64 && BR2_X86_CPU_HAS_MMX && BR2_X86_CPU_HAS_SSE && BR2_X86_CPU_HAS_SSE2 && BR2_X86_CPU_HAS_SSE3 && BR2_X86_CPU_HAS_SSSE3 && BR2_X86_CPU_HAS_SSE4 && BR2_X86_CPU_HAS_SSE42 default y if BR2_i386 && BR2_X86_CPU_HAS_MMX && BR2_X86_CPU_HAS_SSE && BR2_X86_CPU_HAS_SSE2 && BR2_X86_CPU_HAS_SSE3 && BR2_X86_CPU_HAS_SSSE3 default y if BR2_i386 && !BR2_x86_i486 && !BR2_x86_i586 && !BR2_x86_x1000 @@ -4152,6 +4152,7 @@ config BR2_TOOLCHAIN_EXTERNAL_BOOTLIN_X86_64_V4_GLIBC_BLEEDING_EDGE depends on BR2_X86_CPU_HAS_SSE42 depends on BR2_X86_CPU_HAS_AVX depends on BR2_X86_CPU_HAS_AVX2 + depends on BR2_X86_CPU_HAS_AVX512 depends on BR2_USE_MMU depends on !BR2_STATIC_LIBS select BR2_TOOLCHAIN_GCC_AT_LEAST_11 @@ -4185,6 +4186,7 @@ config BR2_TOOLCHAIN_EXTERNAL_BOOTLIN_X86_64_V4_MUSL_BLEEDING_EDGE depends on BR2_X86_CPU_HAS_SSE42 depends on BR2_X86_CPU_HAS_AVX depends on BR2_X86_CPU_HAS_AVX2 + depends on BR2_X86_CPU_HAS_AVX512 depends on BR2_USE_MMU select BR2_TOOLCHAIN_GCC_AT_LEAST_11 select BR2_TOOLCHAIN_HEADERS_AT_LEAST_5_4 @@ -4217,6 +4219,7 @@ config BR2_TOOLCHAIN_EXTERNAL_BOOTLIN_X86_64_V4_UCLIBC_BLEEDING_EDGE depends on BR2_X86_CPU_HAS_SSE42 depends on BR2_X86_CPU_HAS_AVX depends on BR2_X86_CPU_HAS_AVX2 + depends on BR2_X86_CPU_HAS_AVX512 select BR2_TOOLCHAIN_GCC_AT_LEAST_11 select BR2_TOOLCHAIN_HEADERS_AT_LEAST_5_4 select BR2_USE_WCHAR