package/gcc: bump to version 10.3
Remove upstream patch https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=5aeabae7f0cdd8dd3a01103b68b2e7a66a71c685 Rebase the patch: Revert "re PR target/92095 (internal error with -O1 -mcpu=niagara2 -fPIE)" Add the link to the bug report. Tested with toolchain-builder: https://gitlab.com/kubu93/toolchains-builder/-/pipelines/284176939 Signed-off-by: Romain Naour <romain.naour@gmail.com> Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
This commit is contained in:
Romain Naour
Peter Korsgaard
parent
d592118ba4
commit
81b0170a59
@ -1,242 +0,0 @@
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From 09944fba5bfb8e5543ce043c70d08222cf2f97ff Mon Sep 17 00:00:00 2001
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From: Claudiu Zissulescu <claziss@synopsys.com>
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Date: Wed, 11 Nov 2020 12:31:10 +0200
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Subject: [PATCH] arc: Refurbish adc/sbc patterns
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The adc/sbc patterns were unecessary spliting, remove that and
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associated functions.
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gcc/ChangeLog:
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2020-10-11 Claudiu Zissulescu <claziss@synopsys.com>
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* config/arc/arc-protos.h (arc_scheduling_not_expected): Remove
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it.
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(arc_sets_cc_p): Likewise.
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(arc_need_delay): Likewise.
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* config/arc/arc.c (arc_sets_cc_p): Likewise.
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(arc_need_delay): Likewise.
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(arc_scheduling_not_expected): Likewise.
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* config/arc/arc.md: Convert adc/sbc patterns to simple
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instruction definitions.
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Signed-off-by: Claudiu Zissulescu <claziss@synopsys.com>
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Signed-off-by: Veronika Kremneva <kremneva@synopsys.com>
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---
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gcc/config/arc/arc-protos.h | 3 --
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gcc/config/arc/arc.c | 53 -------------------------
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gcc/config/arc/arc.md | 95 ++++++++++++++-------------------------------
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3 files changed, 29 insertions(+), 122 deletions(-)
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diff --git a/gcc/config/arc/arc-protos.h b/gcc/config/arc/arc-protos.h
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index c72d78e3b9e..de4cf47c818 100644
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--- a/gcc/config/arc/arc-protos.h
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+++ b/gcc/config/arc/arc-protos.h
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@@ -90,10 +90,7 @@ extern void split_subsi (rtx *);
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extern void arc_split_move (rtx *);
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extern const char *arc_short_long (rtx_insn *insn, const char *, const char *);
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extern rtx arc_regno_use_in (unsigned int, rtx);
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-extern bool arc_scheduling_not_expected (void);
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-extern bool arc_sets_cc_p (rtx_insn *insn);
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extern int arc_label_align (rtx_insn *label);
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-extern bool arc_need_delay (rtx_insn *insn);
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extern bool arc_text_label (rtx_insn *insn);
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extern bool arc_short_comparison_p (rtx, int);
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diff --git a/gcc/config/arc/arc.c b/gcc/config/arc/arc.c
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index fcb83c4e23e..2daf83dd009 100644
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--- a/gcc/config/arc/arc.c
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+++ b/gcc/config/arc/arc.c
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@@ -10341,59 +10341,6 @@ arc_attr_type (rtx_insn *insn)
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return get_attr_type (insn);
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}
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-/* Return true if insn sets the condition codes. */
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-
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-bool
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-arc_sets_cc_p (rtx_insn *insn)
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-{
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- if (NONJUMP_INSN_P (insn))
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- if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (PATTERN (insn)))
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- insn = seq->insn (seq->len () - 1);
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- return arc_attr_type (insn) == TYPE_COMPARE;
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-}
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-
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-/* Return true if INSN is an instruction with a delay slot we may want
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- to fill. */
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-
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-bool
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-arc_need_delay (rtx_insn *insn)
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-{
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- rtx_insn *next;
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-
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- if (!flag_delayed_branch)
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- return false;
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- /* The return at the end of a function needs a delay slot. */
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- if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == USE
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- && (!(next = next_active_insn (insn))
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- || ((!NONJUMP_INSN_P (next) || GET_CODE (PATTERN (next)) != SEQUENCE)
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- && arc_attr_type (next) == TYPE_RETURN))
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- && (!TARGET_PAD_RETURN
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- || (prev_active_insn (insn)
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- && prev_active_insn (prev_active_insn (insn))
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- && prev_active_insn (prev_active_insn (prev_active_insn (insn))))))
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- return true;
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- if (NONJUMP_INSN_P (insn)
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- ? (GET_CODE (PATTERN (insn)) == USE
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- || GET_CODE (PATTERN (insn)) == CLOBBER
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- || GET_CODE (PATTERN (insn)) == SEQUENCE)
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- : JUMP_P (insn)
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- ? (GET_CODE (PATTERN (insn)) == ADDR_VEC
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- || GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
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- : !CALL_P (insn))
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- return false;
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- return num_delay_slots (insn) != 0;
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-}
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-
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-/* Return true if the scheduling pass(es) has/have already run,
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- i.e. where possible, we should try to mitigate high latencies
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- by different instruction selection. */
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-
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-bool
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-arc_scheduling_not_expected (void)
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-{
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- return cfun->machine->arc_reorg_started;
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-}
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-
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/* Code has a minimum p2 alignment of 1, which we must restore after
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an ADDR_DIFF_VEC. */
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diff --git a/gcc/config/arc/arc.md b/gcc/config/arc/arc.md
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index d4d9f59a3ea..6c09c86884f 100644
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--- a/gcc/config/arc/arc.md
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+++ b/gcc/config/arc/arc.md
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@@ -2857,43 +2857,25 @@ archs4x, archs4xd"
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(set_attr "type" "compare")
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(set_attr "length" "4,4,8")])
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-; w/c/c comes first (rather than w/0/C_0) to prevent the middle-end
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-; needlessly prioritizing the matching constraint.
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-; Rcw/0/C_0 comes before w/c/L so that the lower latency conditional
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-; execution is used where possible.
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-(define_insn_and_split "adc"
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- [(set (match_operand:SI 0 "dest_reg_operand" "=w,Rcw,w,Rcw,w")
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- (plus:SI (plus:SI (ltu:SI (reg:CC_C CC_REG) (const_int 0))
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- (match_operand:SI 1 "nonmemory_operand"
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- "%c,0,c,0,cCal"))
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- (match_operand:SI 2 "nonmemory_operand" "c,C_0,L,I,cCal")))]
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+(define_insn "adc"
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+ [(set (match_operand:SI 0 "register_operand" "=r, r,r,r, r,r")
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+ (plus:SI
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+ (plus:SI
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+ (ltu:SI (reg:CC_C CC_REG) (const_int 0))
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+ (match_operand:SI 1 "nonmemory_operand" "%r, 0,r,0,Cal,r"))
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+ (match_operand:SI 2 "nonmemory_operand" "r,C_0,L,I, r,Cal")))]
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"register_operand (operands[1], SImode)
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|| register_operand (operands[2], SImode)"
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"@
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- adc %0,%1,%2
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- add.cs %0,%1,1
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- adc %0,%1,%2
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- adc %0,%1,%2
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- adc %0,%1,%2"
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- ; if we have a bad schedule after sched2, split.
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- "reload_completed
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- && !optimize_size && (!TARGET_ARC600_FAMILY)
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- && arc_scheduling_not_expected ()
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- && arc_sets_cc_p (prev_nonnote_insn (insn))
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- /* If next comes a return or other insn that needs a delay slot,
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- expect the adc to get into the delay slot. */
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- && next_nonnote_insn (insn)
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- && !arc_need_delay (next_nonnote_insn (insn))
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- /* Restore operands before emitting. */
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- && (extract_insn_cached (insn), 1)"
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- [(set (match_dup 0) (match_dup 3))
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- (cond_exec
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- (ltu (reg:CC_C CC_REG) (const_int 0))
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- (set (match_dup 0) (plus:SI (match_dup 0) (const_int 1))))]
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- "operands[3] = simplify_gen_binary (PLUS, SImode, operands[1], operands[2]);"
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+ adc\\t%0,%1,%2
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+ add.cs\\t%0,%1,1
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+ adc\\t%0,%1,%2
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+ adc\\t%0,%1,%2
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+ adc\\t%0,%1,%2
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+ adc\\t%0,%1,%2"
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[(set_attr "cond" "use")
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(set_attr "type" "cc_arith")
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- (set_attr "length" "4,4,4,4,8")])
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+ (set_attr "length" "4,4,4,4,8,8")])
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; combiner-splitter cmp / scc -> cmp / adc
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(define_split
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@@ -3025,7 +3007,7 @@ archs4x, archs4xd"
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DONE;
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}
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emit_insn (gen_sub_f (l0, l1, l2));
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- emit_insn (gen_sbc (h0, h1, h2, gen_rtx_REG (CCmode, CC_REG)));
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+ emit_insn (gen_sbc (h0, h1, h2));
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DONE;
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")
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@@ -3040,44 +3022,25 @@ archs4x, archs4xd"
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(set_attr "type" "cc_arith")
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(set_attr "length" "4")])
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-; w/c/c comes first (rather than Rcw/0/C_0) to prevent the middle-end
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-; needlessly prioritizing the matching constraint.
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-; Rcw/0/C_0 comes before w/c/L so that the lower latency conditional execution
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-; is used where possible.
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-(define_insn_and_split "sbc"
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- [(set (match_operand:SI 0 "dest_reg_operand" "=w,Rcw,w,Rcw,w")
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- (minus:SI (minus:SI (match_operand:SI 1 "nonmemory_operand"
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- "c,0,c,0,cCal")
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- (ltu:SI (match_operand:CC_C 3 "cc_use_register")
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- (const_int 0)))
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- (match_operand:SI 2 "nonmemory_operand" "c,C_0,L,I,cCal")))]
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+(define_insn "sbc"
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+ [(set (match_operand:SI 0 "dest_reg_operand" "=r,r,r,r,r,r")
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+ (minus:SI
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+ (minus:SI
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+ (match_operand:SI 1 "nonmemory_operand" "r, 0,r,0, r,Cal")
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+ (ltu:SI (reg:CC_C CC_REG) (const_int 0)))
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+ (match_operand:SI 2 "nonmemory_operand" "r,C_0,L,I,Cal,r")))]
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"register_operand (operands[1], SImode)
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|| register_operand (operands[2], SImode)"
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"@
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- sbc %0,%1,%2
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- sub.cs %0,%1,1
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- sbc %0,%1,%2
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- sbc %0,%1,%2
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- sbc %0,%1,%2"
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- ; if we have a bad schedule after sched2, split.
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- "reload_completed
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- && !optimize_size && (!TARGET_ARC600_FAMILY)
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- && arc_scheduling_not_expected ()
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- && arc_sets_cc_p (prev_nonnote_insn (insn))
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- /* If next comes a return or other insn that needs a delay slot,
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- expect the adc to get into the delay slot. */
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- && next_nonnote_insn (insn)
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- && !arc_need_delay (next_nonnote_insn (insn))
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- /* Restore operands before emitting. */
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- && (extract_insn_cached (insn), 1)"
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- [(set (match_dup 0) (match_dup 4))
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- (cond_exec
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- (ltu (reg:CC_C CC_REG) (const_int 0))
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- (set (match_dup 0) (plus:SI (match_dup 0) (const_int -1))))]
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- "operands[4] = simplify_gen_binary (MINUS, SImode, operands[1], operands[2]);"
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+ sbc\\t%0,%1,%2
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+ sub.cs\\t%0,%1,1
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+ sbc\\t%0,%1,%2
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+ sbc\\t%0,%1,%2
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+ sbc\\t%0,%1,%2
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+ sbc\\t%0,%1,%2"
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[(set_attr "cond" "use")
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(set_attr "type" "cc_arith")
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- (set_attr "length" "4,4,4,4,8")])
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+ (set_attr "length" "4,4,4,4,8,8")])
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(define_insn "sub_f"
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[(set (reg:CC CC_REG)
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--
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2.16.2
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@ -1,4 +1,4 @@
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From 472472ee0aaccb6389747d6281c34c558bcca7d8 Mon Sep 17 00:00:00 2001
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From 0824d6819857f306583592bce96315893f91bd84 Mon Sep 17 00:00:00 2001
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From: Romain Naour <romain.naour@gmail.com>
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Date: Wed, 20 Jan 2021 23:26:29 +0100
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Subject: [PATCH] Revert "re PR target/92095 (internal error with -O1
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@ -16,6 +16,9 @@ the commit that introcuce the regression.
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Reverting this patch allowed to produce a working rootfs.
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Reported to gcc:
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98784
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Signed-off-by: Romain Naour <romain.naour@gmail.com>
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Cc: Eric Botcazou <ebotcazou@gcc.gnu.org>
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---
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@ -30,7 +33,7 @@ Cc: Eric Botcazou <ebotcazou@gcc.gnu.org>
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delete mode 100644 gcc/testsuite/gcc.c-torture/compile/20191108-1.c
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diff --git a/gcc/config/sparc/sparc-protos.h b/gcc/config/sparc/sparc-protos.h
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index f525cd7a422..0d9f47af644 100644
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index 5f9999a669c..37452b06415 100644
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--- a/gcc/config/sparc/sparc-protos.h
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+++ b/gcc/config/sparc/sparc-protos.h
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@@ -69,7 +69,6 @@ extern void sparc_split_reg_mem (rtx, rtx, machine_mode);
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@ -42,10 +45,10 @@ index f525cd7a422..0d9f47af644 100644
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extern const char *output_cbranch (rtx, rtx, int, int, int, rtx_insn *);
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extern const char *output_return (rtx_insn *);
|
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diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c
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index aefced85fe1..3ff6f9200f6 100644
|
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index d0843102148..14d112d8ca8 100644
|
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--- a/gcc/config/sparc/sparc.c
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+++ b/gcc/config/sparc/sparc.c
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@@ -4192,6 +4192,13 @@ eligible_for_sibcall_delay (rtx_insn *trial)
|
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@@ -4157,6 +4157,13 @@ eligible_for_sibcall_delay (rtx_insn *trial)
|
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static bool
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sparc_cannot_force_const_mem (machine_mode mode, rtx x)
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{
|
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@ -59,7 +62,7 @@ index aefced85fe1..3ff6f9200f6 100644
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switch (GET_CODE (x))
|
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{
|
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case CONST_INT:
|
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@@ -4227,11 +4234,9 @@ sparc_cannot_force_const_mem (machine_mode mode, rtx x)
|
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@@ -4192,11 +4199,9 @@ sparc_cannot_force_const_mem (machine_mode mode, rtx x)
|
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}
|
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|
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/* Global Offset Table support. */
|
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@ -73,7 +76,7 @@ index aefced85fe1..3ff6f9200f6 100644
|
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|
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/* Return the SYMBOL_REF for the Global Offset Table. */
|
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|
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@@ -4244,6 +4249,27 @@ sparc_got (void)
|
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@@ -4209,6 +4214,27 @@ sparc_got (void)
|
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return got_symbol_rtx;
|
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}
|
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|
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@ -101,7 +104,7 @@ index aefced85fe1..3ff6f9200f6 100644
|
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/* Wrapper around the load_pcrel_sym{si,di} patterns. */
|
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|
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static rtx
|
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@@ -4263,78 +4289,30 @@ gen_load_pcrel_sym (rtx op0, rtx op1, rtx op2)
|
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@@ -4228,78 +4254,30 @@ gen_load_pcrel_sym (rtx op0, rtx op1, rtx op2)
|
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return insn;
|
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}
|
||||
|
||||
@ -186,7 +189,7 @@ index aefced85fe1..3ff6f9200f6 100644
|
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}
|
||||
|
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/* Ensure that we are not using patterns that are not OK with PIC. */
|
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@@ -5499,7 +5477,7 @@ save_local_or_in_reg_p (unsigned int regno, int leaf_function)
|
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@@ -5464,7 +5442,7 @@ save_local_or_in_reg_p (unsigned int regno, int leaf_function)
|
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return true;
|
||||
|
||||
/* GOT register (%l7) if needed. */
|
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@ -195,7 +198,7 @@ index aefced85fe1..3ff6f9200f6 100644
|
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return true;
|
||||
|
||||
/* If the function accesses prior frames, the frame pointer and the return
|
||||
@@ -12542,9 +12520,10 @@ static void
|
||||
@@ -12507,9 +12485,10 @@ static void
|
||||
sparc_file_end (void)
|
||||
{
|
||||
/* If we need to emit the special GOT helper function, do so now. */
|
||||
@ -207,7 +210,7 @@ index aefced85fe1..3ff6f9200f6 100644
|
||||
#ifdef DWARF2_UNWIND_INFO
|
||||
bool do_cfi;
|
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#endif
|
||||
@@ -12581,22 +12560,17 @@ sparc_file_end (void)
|
||||
@@ -12546,22 +12525,17 @@ sparc_file_end (void)
|
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#ifdef DWARF2_UNWIND_INFO
|
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do_cfi = dwarf2out_do_cfi_asm ();
|
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if (do_cfi)
|
||||
@ -236,7 +239,7 @@ index aefced85fe1..3ff6f9200f6 100644
|
||||
#endif
|
||||
}
|
||||
|
||||
@@ -13091,10 +13065,7 @@ sparc_init_pic_reg (void)
|
||||
@@ -13056,10 +13030,7 @@ sparc_init_pic_reg (void)
|
||||
edge entry_edge;
|
||||
rtx_insn *seq;
|
||||
|
||||
@ -249,10 +252,10 @@ index aefced85fe1..3ff6f9200f6 100644
|
||||
|
||||
start_sequence ();
|
||||
diff --git a/gcc/config/sparc/sparc.md b/gcc/config/sparc/sparc.md
|
||||
index 231c0d84778..899804b80ae 100644
|
||||
index 6e9ccb4ecfd..8fb0fa11aed 100644
|
||||
--- a/gcc/config/sparc/sparc.md
|
||||
+++ b/gcc/config/sparc/sparc.md
|
||||
@@ -1604,7 +1604,10 @@
|
||||
@@ -1601,7 +1601,10 @@
|
||||
(clobber (reg:P O7_REG))]
|
||||
"REGNO (operands[0]) == INTVAL (operands[3])"
|
||||
{
|
||||
@ -321,5 +324,5 @@ index f00283f6e7b..67d4ac38095 100644
|
||||
#include <stdbool.h>
|
||||
#include <stdint.h>
|
||||
--
|
||||
2.25.4
|
||||
2.30.2
|
||||
|
||||
@ -74,7 +74,7 @@ config BR2_GCC_VERSION
|
||||
string
|
||||
default "8.4.0" if BR2_GCC_VERSION_8_X
|
||||
default "9.3.0" if BR2_GCC_VERSION_9_X
|
||||
default "10.2.0" if BR2_GCC_VERSION_10_X
|
||||
default "10.3.0" if BR2_GCC_VERSION_10_X
|
||||
default "arc-2020.09-release" if BR2_GCC_VERSION_ARC
|
||||
default "48152afb96c59733d5bc79e3399bb7b3d4b44266" if BR2_GCC_VERSION_CSKY
|
||||
|
||||
|
||||
@ -2,8 +2,8 @@
|
||||
sha512 6de904f552a02de33b11ef52312bb664396efd7e1ce3bbe37bfad5ef617f133095b3767b4804bc7fe78df335cb53bc83f1ac055baed40979ce4c2c3e46b70280 gcc-8.4.0.tar.xz
|
||||
# From ftp://gcc.gnu.org/pub/gcc/releases/gcc-9.3.0/sha512.sum
|
||||
sha512 4b9e3639eef6e623747a22c37a904b4750c93b6da77cf3958d5047e9b5ebddb7eebe091cc16ca0a227c0ecbd2bf3b984b221130f269a97ee4cc18f9cf6c444de gcc-9.3.0.tar.xz
|
||||
# From ftp://gcc.gnu.org/pub/gcc/releases/gcc-10.2.0/sha512.sum
|
||||
sha512 42ae38928bd2e8183af445da34220964eb690b675b1892bbeb7cd5bb62be499011ec9a93397dba5e2fb681afadfc6f2767d03b9035b44ba9be807187ae6dc65e gcc-10.2.0.tar.xz
|
||||
# From ftp://gcc.gnu.org/pub/gcc/releases/gcc-10.3.0/sha512.sum
|
||||
sha512 2b2dd7453d48a398c29eaebd1422b70341001b8c90a62aee51e83344e7fdd8a8e45f82a4a9165bd7edc76dada912c932f4b6632c5636760fec4c5d7e402b3f86 gcc-10.3.0.tar.xz
|
||||
|
||||
# Locally calculated (fetched from Github)
|
||||
sha512 b0853e2b1c5998044392023fa653e399e74118c46e616504ac59e1a2cf27620f94434767ce06b6cf4ca3dfb57f81d6eda92752befaf095ea5e564a9181b4659c gcc-arc-2020.09-release.tar.gz
|
||||
|
||||
Loading…
Reference in New Issue
Block a user