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package/xvisor: add riscv support

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riscv is supported since version 0.3.0 and
d6feda4e80

Signed-off-by: Fabrice Fontaine <fontaine.fabrice@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Arnout Vandecappelle (Essensium/Mind) <arnout@mind.be>
This commit is contained in:
Fabrice Fontaine 2022-01-26 23:51:59 +01:00 committed by Arnout Vandecappelle (Essensium/Mind)
parent 3c7099f3ab
commit 750aa61300
2 changed files with 5 additions and 0 deletions
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3
package/xvisor/Config.in
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@ -2,6 +2,7 @@ config BR2_PACKAGE_XVISOR_ARCH_SUPPORTS
bool
default y if BR2_aarch64
default y if BR2_cortex_a7 || BR2_cortex_a12 || BR2_cortex_a15 || BR2_cortex_a17
default y if BR2_riscv
default y if BR2_x86_64
depends on BR2_USE_MMU
@ -34,6 +35,8 @@ config BR2_PACKAGE_XVISOR_DEFCONFIG
string "Defconfig name"
default "generic-v7-ve" if BR2_ARM_CPU_ARMV7A
default "generic-v8" if BR2_aarch64
default "generic-32b" if BR2_RISCV_32
default "generic-64b" if BR2_RISCV_64
default "x86_64_generic" if BR2_x86_64
depends on BR2_PACKAGE_XVISOR_USE_DEFCONFIG
help

2
package/xvisor/xvisor.mk
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@ -32,6 +32,8 @@ ifeq ($(BR2_x86_64),y)
XVISOR_ARCH = x86
else ifeq ($(BR2_arm)$(BR2_aarch64),y)
XVISOR_ARCH = arm
else ifeq ($(BR2_riscv),y)
XVISOR_ARCH = riscv
endif
ifeq ($(BR2_PACKAGE_XVISOR)$(BR_BUILDING),yy)