From 280ad2e3d3b85bca5a45e8ff365445fe3f111d4d Mon Sep 17 00:00:00 2001 From: Fabrice Fontaine Date: Tue, 11 Jan 2022 23:24:28 +0100 Subject: [PATCH] package/riscv-isa-sim: fix typo in comment Fix typo in comment added by commit ea033cecf990ed3f86619647523a9ad2ccb09adb Signed-off-by: Fabrice Fontaine Signed-off-by: Yann E. MORIN --- package/riscv-isa-sim/Config.in.host | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/riscv-isa-sim/Config.in.host b/package/riscv-isa-sim/Config.in.host index 35e404caf0..4ccf6e9546 100644 --- a/package/riscv-isa-sim/Config.in.host +++ b/package/riscv-isa-sim/Config.in.host @@ -1,6 +1,6 @@ config BR2_PACKAGE_HOST_RISCV_ISA_SIM bool "host riscv-isa-sim" - depends on BR2_HOST_GCC_AT_LEAST_4_9 # C++1 + depends on BR2_HOST_GCC_AT_LEAST_4_9 # C++11 help Spike, the RISC-V ISA Simulator, implements a functional model of one or more RISC-V harts.