arc: add gcc for ARC
ARC needs a specific GCC for now, while we wait for ARC support to get upstreamed. Signed-off-by: Mischa Jonker <mjonker@synopsys.com> Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
This commit is contained in:
Mischa Jonker
Peter Korsgaard
parent
cb232b31ff
commit
1ef17030d0
30
toolchain/gcc/4.4.7-arc/fix_branch_out_of_range.patch
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30
toolchain/gcc/4.4.7-arc/fix_branch_out_of_range.patch
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@ -0,0 +1,30 @@
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arc: Fix operand-out-of-range errors
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brcc_s instructions can generate operand-out-of-range errors. While a
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better solution is being discussed by the compiler team, this workaround
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ensures that the chances of running into this issue are low.
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Signed-off-by: Mischa Jonker <mjonker@synopsys.com>
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diff --git a/gcc/config/arc/arc.c b/gcc/config/arc/arc.c
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index ff602c0..b3ca4c4 100644
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--- a/gcc/config/arc/arc.c
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+++ b/gcc/config/arc/arc.c
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@@ -6565,7 +6565,7 @@ estimate required size increase).
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rtx *ccp = &XEXP (XVECEXP (pat, 0, 1), 0);
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offset = branch_dest (insn) - INSN_ADDRESSES (INSN_UID (insn));
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- if ((offset >= -140 && offset < 140)
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+ if ((offset >= -120 && offset < 120)
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&& rtx_equal_p (XEXP (op, 1), const0_rtx)
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&& compact_register_operand (XEXP (op, 0), VOIDmode)
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&& equality_comparison_operator (op, VOIDmode))
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@@ -6687,7 +6687,7 @@ estimate required size increase).
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if (op0 != cmp0)
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cc_clob_rtx = gen_rtx_REG (CC_ZNmode, CC_REG);
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- else if ((offset >= -140 && offset < 140)
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+ else if ((offset >= -120 && offset < 120)
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&& rtx_equal_p (op1, const0_rtx)
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&& compact_register_operand (op0, VOIDmode)
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&& (GET_CODE (op) == EQ
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@ -9,44 +9,49 @@ choice
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prompt "GCC compiler Version"
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default BR2_GCC_VERSION_4_4_X if BR2_sparc_sparchfleon || BR2_sparc_sparchfleonv8 || BR2_sparc_sparcsfleon || BR2_sparc_sparcsfleonv8
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default BR2_GCC_VERSION_4_2_2_AVR32_2_1_5 if BR2_avr32
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default BR2_GCC_VERSION_4_4_7_ARC if BR2_arc
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default BR2_GCC_VERSION_4_7_X
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help
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Select the version of gcc you wish to use.
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config BR2_GCC_VERSION_4_4_7_ARC
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depends on BR2_arc
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bool "gcc 4.4.7-arc"
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config BR2_GCC_VERSION_4_2_2_AVR32_2_1_5
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depends on BR2_avr32
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bool "gcc 4.2.2-avr32-2.1.5"
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config BR2_GCC_VERSION_4_3_X
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depends on !BR2_avr32 && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8 && !BR2_cortex_a5 && !BR2_cortex_a8 && !BR2_cortex_a9 && !BR2_cortex_a15 && !BR2_x86_atom && !BR2_powerpc_e300c2 && !BR2_powerpc_e300c3 && !BR2_powerpc_e500mc && !BR2_powerpc_464 && !BR2_powerpc_464fp && !BR2_powerpc_476 && !BR2_powerpc_476fp && !BR2_fa526 && !BR2_pj4
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depends on !BR2_arc && !BR2_avr32 && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8 && !BR2_cortex_a5 && !BR2_cortex_a8 && !BR2_cortex_a9 && !BR2_cortex_a15 && !BR2_x86_atom && !BR2_powerpc_e300c2 && !BR2_powerpc_e300c3 && !BR2_powerpc_e500mc && !BR2_powerpc_464 && !BR2_powerpc_464fp && !BR2_powerpc_476 && !BR2_powerpc_476fp && !BR2_fa526 && !BR2_pj4
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bool "gcc 4.3.x"
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config BR2_GCC_VERSION_4_4_X
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depends on !BR2_avr32 && !BR2_cortex_a5 && !BR2_cortex_a15 && !BR2_x86_atom && !BR2_powerpc_476 && !BR2_powerpc_476fp && !BR2_fa526 && !BR2_pj4
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depends on !BR2_arc && !BR2_avr32 && !BR2_cortex_a5 && !BR2_cortex_a15 && !BR2_x86_atom && !BR2_powerpc_476 && !BR2_powerpc_476fp && !BR2_fa526 && !BR2_pj4
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bool "gcc 4.4.x"
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config BR2_GCC_VERSION_4_5_X
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depends on !BR2_avr32 && !BR2_cortex_a15 && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8 && !BR2_fa526 && !BR2_pj4
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depends on !BR2_arc && !BR2_avr32 && !BR2_cortex_a15 && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8 && !BR2_fa526 && !BR2_pj4
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select BR2_GCC_NEEDS_MPC
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bool "gcc 4.5.x"
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config BR2_GCC_VERSION_4_6_X
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depends on !BR2_avr32 && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8 && !BR2_pj4
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depends on !BR2_arc && !BR2_avr32 && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8 && !BR2_pj4
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select BR2_GCC_NEEDS_MPC
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bool "gcc 4.6.x"
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config BR2_GCC_VERSION_4_7_X
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depends on !BR2_avr32 && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8 && !BR2_pj4
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depends on !BR2_arc && !BR2_avr32 && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8 && !BR2_pj4
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select BR2_GCC_NEEDS_MPC
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bool "gcc 4.7.x"
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config BR2_GCC_VERSION_4_8_X
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depends on !BR2_avr32 && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8
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depends on !BR2_arc && !BR2_avr32 && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8
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select BR2_GCC_NEEDS_MPC
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bool "gcc 4.8.x"
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config BR2_GCC_VERSION_SNAP
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depends on !BR2_avr32 && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8
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depends on !BR2_arc && !BR2_avr32 && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8
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select BR2_GCC_NEEDS_MPC
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bool "gcc snapshot"
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endchoice
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@ -74,6 +79,7 @@ config BR2_GCC_VERSION
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default "4.2.2-avr32-2.1.5" if BR2_GCC_VERSION_4_2_2_AVR32_2_1_5
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default "4.3.6" if BR2_GCC_VERSION_4_3_X
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default "4.4.7" if BR2_GCC_VERSION_4_4_X
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default "4.4.7-arc" if BR2_GCC_VERSION_4_4_7_ARC
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default "4.5.4" if BR2_GCC_VERSION_4_5_X
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default "4.6.4" if BR2_GCC_VERSION_4_6_X
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default "4.7.3" if BR2_GCC_VERSION_4_7_X
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@ -119,6 +125,6 @@ config BR2_GCC_ENABLE_TLS
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config BR2_GCC_ENABLE_OPENMP
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bool "Enable compiler OpenMP support"
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depends on !BR2_PTHREADS_NONE && !BR2_avr32
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depends on !BR2_PTHREADS_NONE && !BR2_avr32 && !BR2_arc
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help
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Enable OpenMP support for the compiler
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@ -29,6 +29,8 @@ ifneq ($(GCC_SNAP_DATE),)
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GCC_SITE:=ftp://gcc.gnu.org/pub/gcc/snapshots/$(GCC_SNAP_DATE)/
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else ifeq ($(findstring avr32,$(GCC_VERSION)),avr32)
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GCC_SITE:=ftp://www.at91.com/pub/buildroot/
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else ifeq ($(findstring arc,$(GCC_VERSION)),arc)
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GCC_SITE:=$(BR2_ARC_SITE)
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else
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GCC_SITE:=$(BR2_GNU_MIRROR:/=)/gcc/gcc-$(GCC_VERSION)
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endif
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