libaio: add patch to support AVR32
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
This commit is contained in:
Thomas Petazzoni
Peter Korsgaard
parent
20d4792e5b
commit
1e17f73d27
2
CHANGES
2
CHANGES
@ -5,7 +5,7 @@
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Updated/fixed packages: alsa-utils, at, busybox, bzip2, dbus,
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direcfb-examples, dmalloc, cloop, cups, ffmpeg, gdk-pixbuf,
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hostapd, i2c-tools, input-tools, libconfig, lsof,
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hostapd, i2c-tools, input-tools, libaio, libconfig, lsof,
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ltp-testsuite, lvm2, m4, memtester, mii-diag, mrouted,
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netplug, openssh, openssl, openvpn, pango, qt, rsync, sdl_gfx,
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sdl_sound, sysklogd, sysvinit, udev, usbutils, xz, zlib
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122
package/libaio/libaio-0.3.109-avr32-support.patch
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122
package/libaio/libaio-0.3.109-avr32-support.patch
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@ -0,0 +1,122 @@
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Add AVR32 support to libaio
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Taken from OpenWRT repository.
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--- a/src/libaio.h
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+++ b/src/libaio.h
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@@ -107,6 +107,10 @@ typedef enum io_iocb_cmd {
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# else
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# error "neither mipseb nor mipsel?"
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# endif
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+#elif defined(__avr32__) /* big endian, 32 bits */
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+#define PADDED(x, y) unsigned y; x
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+#define PADDEDptr(x, y) unsigned y; x
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+#define PADDEDul(x, y) unsigned y; unsigned long x;
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#else
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#error endian?
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#endif
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--- /dev/null
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+++ b/src/syscall-avr32.h
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@@ -0,0 +1,91 @@
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+/*
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+ * Copyright (C) 2007 Atmel Corporation
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License version 2 as
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+ * published by the Free Software Foundation.
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+ */
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+
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+#define __NR_io_setup 197
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+#define __NR_io_destroy 198
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+#define __NR_io_getevents 199
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+#define __NR_io_submit 200
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+#define __NR_io_cancel 201
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+
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+#define io_syscall1(type,fname,sname,type1,arg1) \
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+type fname(type1 arg1) \
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+{ \
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+ register long __r12 __asm__("r12") = (long)arg1; \
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+ register long __res_r12 __asm__("r12"); \
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+ register long __scno __asm__("r8") = __NR_##sname; \
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+ __asm__ __volatile__("scall" \
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+ : "=r"(__res_r12) \
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+ : "0"(__r12), "r"(__scno) \
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+ : "memory"); \
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+ return (type) __res_r12; \
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+}
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+
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+#define io_syscall2(type,fname,sname,type1,arg1,type2,arg2) \
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+type fname(type1 arg1, type2 arg2) \
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+{ \
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+ register long __r12 __asm__("r12") = (long)arg1; \
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+ register long __r11 __asm__("r11") = (long)arg2; \
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+ register long __res_r12 __asm__("r12"); \
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+ register long __scno __asm__("r8") = __NR_##sname; \
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+ __asm__ __volatile__("scall" \
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+ : "=r"(__res_r12) \
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+ : "0"(__r12), "r"(__r11), "r"(__scno) \
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+ : "memory"); \
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+ return (type) __res_r12; \
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+}
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+
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+#define io_syscall3(type,fname,sname,type1,arg1,type2,arg2,type3,arg3) \
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+type fname(type1 arg1, type2 arg2, type3 arg3) \
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+{ \
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+ register long __r12 __asm__("r12") = (long)arg1; \
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+ register long __r11 __asm__("r11") = (long)arg2; \
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+ register long __r10 __asm__("r10") = (long)arg3; \
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+ register long __res_r12 __asm__("r12"); \
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+ register long __scno __asm__("r8") = __NR_##sname; \
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+ __asm__ __volatile__("scall" \
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+ : "=r"(__res_r12) \
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+ : "0"(__r12), "r"(__r11), "r"(__r10), \
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+ "r"(__scno) \
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+ : "memory"); \
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+ return (type) __res_r12; \
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+}
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+
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+#define io_syscall4(type,fname,sname,type1,arg1,type2,arg2,type3,arg3,type4,arg4) \
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+type fname(type1 arg1, type2 arg2, type3 arg3, type4 arg4) \
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+{ \
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+ register long __r12 __asm__("r12") = (long)arg1; \
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+ register long __r11 __asm__("r11") = (long)arg2; \
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+ register long __r10 __asm__("r10") = (long)arg3; \
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+ register long __r9 __asm__("r9") = (long)arg4; \
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+ register long __res_r12 __asm__("r12"); \
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+ register long __scno __asm__("r8") = __NR_##sname; \
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+ __asm__ __volatile__("scall" \
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+ : "=r"(__res_r12) \
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+ : "0"(__r12), "r"(__r11), "r"(__r10), \
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+ "r"(__r9), "r"(__scno) \
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+ : "memory"); \
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+ return (type) __res_r12; \
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+}
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+
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+#define io_syscall5(type,fname,sname,type1,arg1,type2,arg2,type3,arg3,type4,arg4,type5,arg5) \
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+type fname(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5) \
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+{ \
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+ register long __r12 __asm__("r12") = (long)arg1; \
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+ register long __r11 __asm__("r11") = (long)arg2; \
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+ register long __r10 __asm__("r10") = (long)arg3; \
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+ register long __r9 __asm__("r9") = (long)arg4; \
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+ register long __r5 __asm__("r5") = (long)arg5; \
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+ register long __res_r12 __asm__("r12"); \
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+ register long __scno __asm__("r8") = __NR_##sname; \
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+ __asm__ __volatile__("scall" \
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+ : "=r"(__res_r12) \
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+ : "0"(__r12), "r"(__r11), "r"(__r10), \
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+ "r"(__r9), "r"(__r5), "r"(__scno) \
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+ : "memory"); \
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+ return (type) __res_r12; \
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+}
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--- a/src/syscall.h
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+++ b/src/syscall.h
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@@ -32,6 +32,8 @@
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#include "syscall-parisc.h"
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#elif defined(__mips__)
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#include "syscall-mips.h"
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+#elif defined(__avr32__)
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+#include "syscall-avr32.h"
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#else
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#error "add syscall-arch.h"
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#endif
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