arch/arm: add two new non-cortex-based armv8.2a cores

The Neoverse N1 CPU was supported in GCC earlier through the codename Ares [1].

[1] https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=37cf0ddecfd1eb5c6852a44135af5a92e5103931

Build tested:
https://gitlab.com/kubu93/buildroot/pipelines/60318953

Signed-off-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
[Romain: rename BR2_ares to BR2_neoverse_n1]
Signed-off-by: Romain Naour <romain.naour@gmail.com>
Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Signed-off-by: Giulio Benetti <giulio.benetti@micronovasrl.com>
[Arnout: 'aka' instead of 'alias']
Signed-off-by: Arnout Vandecappelle (Essensium/Mind) <arnout@mind.be>
This commit is contained in:
Yann E. MORIN 2019-06-20 12:07:24 +02:00 committed by Arnout Vandecappelle (Essensium/Mind)
parent e65a173e52
commit 0b630b5bf3

View File

@ -512,6 +512,22 @@ config BR2_cortex_a76_a55
select BR2_ARM_CPU_ARMV8A
select BR2_ARCH_HAS_MMU_OPTIONAL
select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
config BR2_neoverse_n1
bool "neoverse-N1 (aka ares)"
select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_FP_ARMV8
select BR2_ARM_CPU_ARMV8A
select BR2_ARCH_HAS_MMU_OPTIONAL
select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
config BR2_tsv110
bool "tsv110"
depends on BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_FP_ARMV8
select BR2_ARM_CPU_ARMV8A
select BR2_ARCH_HAS_MMU_OPTIONAL
select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
comment "armv8.4a cores"
config BR2_saphira
@ -877,6 +893,8 @@ config BR2_GCC_TARGET_CPU
default "cortex-a75.cortex-a55" if BR2_cortex_a75_a55
default "cortex-a76" if BR2_cortex_a76
default "cortex-a76.cortex-a55" if BR2_cortex_a76_a55
default "neoverse-n1" if BR2_neoverse_n1
default "tsv110" if BR2_tsv110
# armv8.4a
default "saphira" if BR2_saphira