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kumquat-buildroot/arch/Config.in.riscv

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arch: add support for RISC-V 64-bit (riscv64) architecture This enables a riscv64 system to be built with a Buildroot generated toolchain (gcc >= 7.x, binutils >= 2.30, glibc only). This configuration has been used to successfully build a qemu-bootable riscv-linux-4.15 kernel (https://github.com/riscv/riscv-linux.git). Signed-off-by: Mark Corbin <mark.corbin@embecosm.com> [Thomas: - simplify arch.mk.riscv by directly setting GCC_TARGET_ARCH - simplify glibc.mk changes by using GLIBC_CONF_ENV.] Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
2018-09-12 12:22:54 +02:00
# RISC-V CPU ISA extensions.
choice
prompt "Target Architecture Variant"
default BR2_riscv_g
config BR2_riscv_g
bool "General purpose (G)"
select BR2_RISCV_ISA_RVI
select BR2_RISCV_ISA_RVM
select BR2_RISCV_ISA_RVA
select BR2_RISCV_ISA_RVF
select BR2_RISCV_ISA_RVD
help
General purpose (G) is equivalent to IMAFD.
config BR2_riscv_custom
bool "Custom architecture"
select BR2_RISCV_ISA_RVI
endchoice
comment "Instruction Set Extensions"
arch/Config.in.riscv: allow extensions for generic The generic extension set 'G' is realy a base with the minimal set of extensions needed to be comfortable (but not required) to run a linux-bassed system. Similarly, we consider the custom to be about the custom set of features (not about a custom core implementing such a set). As such, we allow that a core with the G set can have futher extensions without requiring it to be configured as a custom set. We drop the intermediate symbols with the prompts, and move the prompts to the previously hidden symbols, and add a prompt for the I set. This alows one to clearly see what the generic set is about, without having to delve into the help and hunt the list of selected symbol. Note however that the G set implies Zicsr and Zifencei, but we have no prompt for thos two, because in Buildroot, we assume that they are mandatory and always present, like the I set (which they previously were part of). Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com> [yann.morin.1998@free.fr: - drop the intermediate symbols - move prompt to previously hidden symbols - add symbol for I - update defconfigs - reword the commit log accordingly ] Signed-off-by: Yann E. MORIN <yann.morin.1998@free.fr>
2023-08-18 12:42:59 +02:00
config BR2_RISCV_ISA_RVI
bool "Base Integer (I)"
config BR2_RISCV_ISA_RVM
arch: add support for RISC-V 64-bit (riscv64) architecture This enables a riscv64 system to be built with a Buildroot generated toolchain (gcc >= 7.x, binutils >= 2.30, glibc only). This configuration has been used to successfully build a qemu-bootable riscv-linux-4.15 kernel (https://github.com/riscv/riscv-linux.git). Signed-off-by: Mark Corbin <mark.corbin@embecosm.com> [Thomas: - simplify arch.mk.riscv by directly setting GCC_TARGET_ARCH - simplify glibc.mk changes by using GLIBC_CONF_ENV.] Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
2018-09-12 12:22:54 +02:00
bool "Integer Multiplication and Division (M)"
arch/Config.in.riscv: allow extensions for generic The generic extension set 'G' is realy a base with the minimal set of extensions needed to be comfortable (but not required) to run a linux-bassed system. Similarly, we consider the custom to be about the custom set of features (not about a custom core implementing such a set). As such, we allow that a core with the G set can have futher extensions without requiring it to be configured as a custom set. We drop the intermediate symbols with the prompts, and move the prompts to the previously hidden symbols, and add a prompt for the I set. This alows one to clearly see what the generic set is about, without having to delve into the help and hunt the list of selected symbol. Note however that the G set implies Zicsr and Zifencei, but we have no prompt for thos two, because in Buildroot, we assume that they are mandatory and always present, like the I set (which they previously were part of). Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com> [yann.morin.1998@free.fr: - drop the intermediate symbols - move prompt to previously hidden symbols - add symbol for I - update defconfigs - reword the commit log accordingly ] Signed-off-by: Yann E. MORIN <yann.morin.1998@free.fr>
2023-08-18 12:42:59 +02:00
config BR2_RISCV_ISA_RVA
arch: add support for RISC-V 64-bit (riscv64) architecture This enables a riscv64 system to be built with a Buildroot generated toolchain (gcc >= 7.x, binutils >= 2.30, glibc only). This configuration has been used to successfully build a qemu-bootable riscv-linux-4.15 kernel (https://github.com/riscv/riscv-linux.git). Signed-off-by: Mark Corbin <mark.corbin@embecosm.com> [Thomas: - simplify arch.mk.riscv by directly setting GCC_TARGET_ARCH - simplify glibc.mk changes by using GLIBC_CONF_ENV.] Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
2018-09-12 12:22:54 +02:00
bool "Atomic Instructions (A)"
arch/Config.in.riscv: allow extensions for generic The generic extension set 'G' is realy a base with the minimal set of extensions needed to be comfortable (but not required) to run a linux-bassed system. Similarly, we consider the custom to be about the custom set of features (not about a custom core implementing such a set). As such, we allow that a core with the G set can have futher extensions without requiring it to be configured as a custom set. We drop the intermediate symbols with the prompts, and move the prompts to the previously hidden symbols, and add a prompt for the I set. This alows one to clearly see what the generic set is about, without having to delve into the help and hunt the list of selected symbol. Note however that the G set implies Zicsr and Zifencei, but we have no prompt for thos two, because in Buildroot, we assume that they are mandatory and always present, like the I set (which they previously were part of). Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com> [yann.morin.1998@free.fr: - drop the intermediate symbols - move prompt to previously hidden symbols - add symbol for I - update defconfigs - reword the commit log accordingly ] Signed-off-by: Yann E. MORIN <yann.morin.1998@free.fr>
2023-08-18 12:42:59 +02:00
config BR2_RISCV_ISA_RVF
arch: add support for RISC-V 64-bit (riscv64) architecture This enables a riscv64 system to be built with a Buildroot generated toolchain (gcc >= 7.x, binutils >= 2.30, glibc only). This configuration has been used to successfully build a qemu-bootable riscv-linux-4.15 kernel (https://github.com/riscv/riscv-linux.git). Signed-off-by: Mark Corbin <mark.corbin@embecosm.com> [Thomas: - simplify arch.mk.riscv by directly setting GCC_TARGET_ARCH - simplify glibc.mk changes by using GLIBC_CONF_ENV.] Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
2018-09-12 12:22:54 +02:00
bool "Single-precision Floating-point (F)"
arch/Config.in.riscv: allow extensions for generic The generic extension set 'G' is realy a base with the minimal set of extensions needed to be comfortable (but not required) to run a linux-bassed system. Similarly, we consider the custom to be about the custom set of features (not about a custom core implementing such a set). As such, we allow that a core with the G set can have futher extensions without requiring it to be configured as a custom set. We drop the intermediate symbols with the prompts, and move the prompts to the previously hidden symbols, and add a prompt for the I set. This alows one to clearly see what the generic set is about, without having to delve into the help and hunt the list of selected symbol. Note however that the G set implies Zicsr and Zifencei, but we have no prompt for thos two, because in Buildroot, we assume that they are mandatory and always present, like the I set (which they previously were part of). Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com> [yann.morin.1998@free.fr: - drop the intermediate symbols - move prompt to previously hidden symbols - add symbol for I - update defconfigs - reword the commit log accordingly ] Signed-off-by: Yann E. MORIN <yann.morin.1998@free.fr>
2023-08-18 12:42:59 +02:00
config BR2_RISCV_ISA_RVD
arch: add support for RISC-V 64-bit (riscv64) architecture This enables a riscv64 system to be built with a Buildroot generated toolchain (gcc >= 7.x, binutils >= 2.30, glibc only). This configuration has been used to successfully build a qemu-bootable riscv-linux-4.15 kernel (https://github.com/riscv/riscv-linux.git). Signed-off-by: Mark Corbin <mark.corbin@embecosm.com> [Thomas: - simplify arch.mk.riscv by directly setting GCC_TARGET_ARCH - simplify glibc.mk changes by using GLIBC_CONF_ENV.] Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
2018-09-12 12:22:54 +02:00
bool "Double-precision Floating-point (D)"
depends on BR2_RISCV_ISA_RVF
arch/Config.in.riscv: allow extensions for generic The generic extension set 'G' is realy a base with the minimal set of extensions needed to be comfortable (but not required) to run a linux-bassed system. Similarly, we consider the custom to be about the custom set of features (not about a custom core implementing such a set). As such, we allow that a core with the G set can have futher extensions without requiring it to be configured as a custom set. We drop the intermediate symbols with the prompts, and move the prompts to the previously hidden symbols, and add a prompt for the I set. This alows one to clearly see what the generic set is about, without having to delve into the help and hunt the list of selected symbol. Note however that the G set implies Zicsr and Zifencei, but we have no prompt for thos two, because in Buildroot, we assume that they are mandatory and always present, like the I set (which they previously were part of). Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com> [yann.morin.1998@free.fr: - drop the intermediate symbols - move prompt to previously hidden symbols - add symbol for I - update defconfigs - reword the commit log accordingly ] Signed-off-by: Yann E. MORIN <yann.morin.1998@free.fr>
2023-08-18 12:42:59 +02:00
config BR2_RISCV_ISA_RVC
arch: add support for RISC-V 64-bit (riscv64) architecture This enables a riscv64 system to be built with a Buildroot generated toolchain (gcc >= 7.x, binutils >= 2.30, glibc only). This configuration has been used to successfully build a qemu-bootable riscv-linux-4.15 kernel (https://github.com/riscv/riscv-linux.git). Signed-off-by: Mark Corbin <mark.corbin@embecosm.com> [Thomas: - simplify arch.mk.riscv by directly setting GCC_TARGET_ARCH - simplify glibc.mk changes by using GLIBC_CONF_ENV.] Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
2018-09-12 12:22:54 +02:00
bool "Compressed Instructions (C)"
arch/riscv: enable RISC-V Toolchain with Vector Extension This commits adds support for building a RISC-V toolchain with the vector extension, available since gcc 12. Signed-off-by: Tianrui Wei <tianrui@tianruiwei.com> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
2023-06-09 19:46:42 +02:00
arch/Config.in.riscv: allow extensions for generic The generic extension set 'G' is realy a base with the minimal set of extensions needed to be comfortable (but not required) to run a linux-bassed system. Similarly, we consider the custom to be about the custom set of features (not about a custom core implementing such a set). As such, we allow that a core with the G set can have futher extensions without requiring it to be configured as a custom set. We drop the intermediate symbols with the prompts, and move the prompts to the previously hidden symbols, and add a prompt for the I set. This alows one to clearly see what the generic set is about, without having to delve into the help and hunt the list of selected symbol. Note however that the G set implies Zicsr and Zifencei, but we have no prompt for thos two, because in Buildroot, we assume that they are mandatory and always present, like the I set (which they previously were part of). Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com> [yann.morin.1998@free.fr: - drop the intermediate symbols - move prompt to previously hidden symbols - add symbol for I - update defconfigs - reword the commit log accordingly ] Signed-off-by: Yann E. MORIN <yann.morin.1998@free.fr>
2023-08-18 12:42:59 +02:00
config BR2_RISCV_ISA_RVV
arch/riscv: enable RISC-V Toolchain with Vector Extension This commits adds support for building a RISC-V toolchain with the vector extension, available since gcc 12. Signed-off-by: Tianrui Wei <tianrui@tianruiwei.com> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
2023-06-09 19:46:42 +02:00
bool "Vector Instructions (V)"
select BR2_ARCH_NEEDS_GCC_AT_LEAST_12
arch: add support for RISC-V 32-bit (riscv32) architecture This enables a riscv32 system to be built with a Buildroot generated toolchain (gcc >= 7.x, binutils >= 2.30, glibc only). This requires a custom version of glibc 2.26 from the riscv-glibc repository. Note that there are no tags in this repository, so the glibc version just consists of the 40 character commit id string. Thanks to Fabrice Bellard for pointing me towards the 32-bit glibc repository and for providing the necessary patch to get it to build. Signed-off-by: Mark Corbin <mark.corbin@embecosm.com> Reviewed-by: Matt Weber <matthew.weber@rockwellcollins.com> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
2018-10-21 21:12:01 +02:00
choice
prompt "Target Architecture Size"
default BR2_RISCV_64
config BR2_RISCV_32
bool "32-bit"
arch: rework MMU option handling and move to "Target architecture" menu The MMU option is currently located in the "Toolchain" menu, but it doesn't make sense as it's really architecture related. In addition, the selection of MMU has an impact on the choice of binary format available, which is visible in the architecture menu. Therefore, this commit moves the MMU option into the architecture menu. However, if we simply move it in arch/Config.in, it means that we would have the following order of options: Target architecture Target architecture variant ABI MMU Binary format But really, the MMU option should be right below the Target architecture variant, and the available ABIs derived from that. The variant and ABI are arch-specfic, and defined in the per-arch Config.in fragments; a Kconfig option can have only one prompt defined, even under conditions, and appears at the place in the menu where its prompt was defined. So, there is no (easy) possibility to have a generic option appear where we want it. Since in fact only 2 architectures show a visible prompt for the MMU option (RISC-V and Xtensa), we move this option in arch/Config.in.riscv and arch/Config.in.xtensa. Some walkthrough the commit: - BR2_ARCH_HAS_MMU_MANDATORY and BR2_ARCH_HAS_MMU_OPTIONAL are removed as they are no longer needed - BR2_USE_MMU becomes a hidden boolean - All the places where we used to select BR2_ARCH_HAS_MMU_MANDATORY now select BR2_USE_MMU directly. - Introduce BR2_RISCV_USE_MMU and BR2_XTENSA_USE_MMU. - All defconfigs that used "# BR2_USE_MMU is not set" are switched to using the new option. All in all, this simplifies things quite a bit, and allows to have a good option ordering in the Target architecture menu. This commit might raise a concern in terms of backward compatibility with existing configurations. The only configurations that will be broken by this change are RISC-V noMMU (which was very recently introduced) and Xtensa noMMU (which we can probably agree is not such a widely popular configuration). Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Reviewed-by: Damien Le Moal <damien.lemoal@opensource.wdc.com> Tested-by: Damien Le Moal <damien.lemoal@opensource.wdc.com> [yann.morin.1998@free.fr: - expand further why we need per-arch MMU options ] Signed-off-by: Yann E. MORIN <yann.morin.1998@free.fr>
2022-07-26 18:39:51 +02:00
select BR2_USE_MMU
arch: add support for RISC-V 32-bit (riscv32) architecture This enables a riscv32 system to be built with a Buildroot generated toolchain (gcc >= 7.x, binutils >= 2.30, glibc only). This requires a custom version of glibc 2.26 from the riscv-glibc repository. Note that there are no tags in this repository, so the glibc version just consists of the 40 character commit id string. Thanks to Fabrice Bellard for pointing me towards the 32-bit glibc repository and for providing the necessary patch to get it to build. Signed-off-by: Mark Corbin <mark.corbin@embecosm.com> Reviewed-by: Matt Weber <matthew.weber@rockwellcollins.com> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
2018-10-21 21:12:01 +02:00
arch: add support for RISC-V 64-bit (riscv64) architecture This enables a riscv64 system to be built with a Buildroot generated toolchain (gcc >= 7.x, binutils >= 2.30, glibc only). This configuration has been used to successfully build a qemu-bootable riscv-linux-4.15 kernel (https://github.com/riscv/riscv-linux.git). Signed-off-by: Mark Corbin <mark.corbin@embecosm.com> [Thomas: - simplify arch.mk.riscv by directly setting GCC_TARGET_ARCH - simplify glibc.mk changes by using GLIBC_CONF_ENV.] Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
2018-09-12 12:22:54 +02:00
config BR2_RISCV_64
arch: add support for RISC-V 32-bit (riscv32) architecture This enables a riscv32 system to be built with a Buildroot generated toolchain (gcc >= 7.x, binutils >= 2.30, glibc only). This requires a custom version of glibc 2.26 from the riscv-glibc repository. Note that there are no tags in this repository, so the glibc version just consists of the 40 character commit id string. Thanks to Fabrice Bellard for pointing me towards the 32-bit glibc repository and for providing the necessary patch to get it to build. Signed-off-by: Mark Corbin <mark.corbin@embecosm.com> Reviewed-by: Matt Weber <matthew.weber@rockwellcollins.com> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
2018-10-21 21:12:01 +02:00
bool "64-bit"
arch: add support for RISC-V 64-bit (riscv64) architecture This enables a riscv64 system to be built with a Buildroot generated toolchain (gcc >= 7.x, binutils >= 2.30, glibc only). This configuration has been used to successfully build a qemu-bootable riscv-linux-4.15 kernel (https://github.com/riscv/riscv-linux.git). Signed-off-by: Mark Corbin <mark.corbin@embecosm.com> [Thomas: - simplify arch.mk.riscv by directly setting GCC_TARGET_ARCH - simplify glibc.mk changes by using GLIBC_CONF_ENV.] Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
2018-09-12 12:22:54 +02:00
select BR2_ARCH_IS_64
arch: add support for RISC-V 32-bit (riscv32) architecture This enables a riscv32 system to be built with a Buildroot generated toolchain (gcc >= 7.x, binutils >= 2.30, glibc only). This requires a custom version of glibc 2.26 from the riscv-glibc repository. Note that there are no tags in this repository, so the glibc version just consists of the 40 character commit id string. Thanks to Fabrice Bellard for pointing me towards the 32-bit glibc repository and for providing the necessary patch to get it to build. Signed-off-by: Mark Corbin <mark.corbin@embecosm.com> Reviewed-by: Matt Weber <matthew.weber@rockwellcollins.com> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
2018-10-21 21:12:01 +02:00
endchoice
arch: rework MMU option handling and move to "Target architecture" menu The MMU option is currently located in the "Toolchain" menu, but it doesn't make sense as it's really architecture related. In addition, the selection of MMU has an impact on the choice of binary format available, which is visible in the architecture menu. Therefore, this commit moves the MMU option into the architecture menu. However, if we simply move it in arch/Config.in, it means that we would have the following order of options: Target architecture Target architecture variant ABI MMU Binary format But really, the MMU option should be right below the Target architecture variant, and the available ABIs derived from that. The variant and ABI are arch-specfic, and defined in the per-arch Config.in fragments; a Kconfig option can have only one prompt defined, even under conditions, and appears at the place in the menu where its prompt was defined. So, there is no (easy) possibility to have a generic option appear where we want it. Since in fact only 2 architectures show a visible prompt for the MMU option (RISC-V and Xtensa), we move this option in arch/Config.in.riscv and arch/Config.in.xtensa. Some walkthrough the commit: - BR2_ARCH_HAS_MMU_MANDATORY and BR2_ARCH_HAS_MMU_OPTIONAL are removed as they are no longer needed - BR2_USE_MMU becomes a hidden boolean - All the places where we used to select BR2_ARCH_HAS_MMU_MANDATORY now select BR2_USE_MMU directly. - Introduce BR2_RISCV_USE_MMU and BR2_XTENSA_USE_MMU. - All defconfigs that used "# BR2_USE_MMU is not set" are switched to using the new option. All in all, this simplifies things quite a bit, and allows to have a good option ordering in the Target architecture menu. This commit might raise a concern in terms of backward compatibility with existing configurations. The only configurations that will be broken by this change are RISC-V noMMU (which was very recently introduced) and Xtensa noMMU (which we can probably agree is not such a widely popular configuration). Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Reviewed-by: Damien Le Moal <damien.lemoal@opensource.wdc.com> Tested-by: Damien Le Moal <damien.lemoal@opensource.wdc.com> [yann.morin.1998@free.fr: - expand further why we need per-arch MMU options ] Signed-off-by: Yann E. MORIN <yann.morin.1998@free.fr>
2022-07-26 18:39:51 +02:00
config BR2_RISCV_USE_MMU
bool "MMU support"
default y
depends on BR2_RISCV_64
select BR2_USE_MMU
help
Enable this option if your RISC-V core has a MMU (Memory
Management Unit).
arch: add support for RISC-V 64-bit (riscv64) architecture This enables a riscv64 system to be built with a Buildroot generated toolchain (gcc >= 7.x, binutils >= 2.30, glibc only). This configuration has been used to successfully build a qemu-bootable riscv-linux-4.15 kernel (https://github.com/riscv/riscv-linux.git). Signed-off-by: Mark Corbin <mark.corbin@embecosm.com> [Thomas: - simplify arch.mk.riscv by directly setting GCC_TARGET_ARCH - simplify glibc.mk changes by using GLIBC_CONF_ENV.] Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
2018-09-12 12:22:54 +02:00
choice
prompt "Target ABI"
arch/riscv: set the default float ABI based on ISA extensions This patch sets the default floating point ABI based on the ISA extensions that have been selected rather than defaulting to soft float. For 64-bit: ISA 'D' selects lp64d ISA 'F' selects lp64f Otherwise select lp64 For 32-bit: ISA 'D' selects ilp32d ISA 'F' selects ilp32f Otherwise select ilp32 This change was proposed by Palmer Dabbelt at SiFive. Signed-off-by: Mark Corbin <mark.corbin@embecosm.com> Reviewed-by: Palmer Dabbelt <palmer@sifive.com> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
2019-09-19 17:40:35 +02:00
default BR2_RISCV_ABI_ILP32D if !BR2_ARCH_IS_64 && BR2_RISCV_ISA_RVD
default BR2_RISCV_ABI_ILP32F if !BR2_ARCH_IS_64 && BR2_RISCV_ISA_RVF
default BR2_RISCV_ABI_ILP32 if !BR2_ARCH_IS_64
default BR2_RISCV_ABI_LP64D if BR2_ARCH_IS_64 && BR2_RISCV_ISA_RVD
default BR2_RISCV_ABI_LP64F if BR2_ARCH_IS_64 && BR2_RISCV_ISA_RVF
default BR2_RISCV_ABI_LP64 if BR2_ARCH_IS_64
arch: add support for RISC-V 32-bit (riscv32) architecture This enables a riscv32 system to be built with a Buildroot generated toolchain (gcc >= 7.x, binutils >= 2.30, glibc only). This requires a custom version of glibc 2.26 from the riscv-glibc repository. Note that there are no tags in this repository, so the glibc version just consists of the 40 character commit id string. Thanks to Fabrice Bellard for pointing me towards the 32-bit glibc repository and for providing the necessary patch to get it to build. Signed-off-by: Mark Corbin <mark.corbin@embecosm.com> Reviewed-by: Matt Weber <matthew.weber@rockwellcollins.com> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
2018-10-21 21:12:01 +02:00
config BR2_RISCV_ABI_ILP32
bool "ilp32"
depends on !BR2_ARCH_IS_64
config BR2_RISCV_ABI_ILP32F
bool "ilp32f"
depends on !BR2_ARCH_IS_64 && BR2_RISCV_ISA_RVF
config BR2_RISCV_ABI_ILP32D
bool "ilp32d"
depends on !BR2_ARCH_IS_64 && BR2_RISCV_ISA_RVD
arch: add support for RISC-V 64-bit (riscv64) architecture This enables a riscv64 system to be built with a Buildroot generated toolchain (gcc >= 7.x, binutils >= 2.30, glibc only). This configuration has been used to successfully build a qemu-bootable riscv-linux-4.15 kernel (https://github.com/riscv/riscv-linux.git). Signed-off-by: Mark Corbin <mark.corbin@embecosm.com> [Thomas: - simplify arch.mk.riscv by directly setting GCC_TARGET_ARCH - simplify glibc.mk changes by using GLIBC_CONF_ENV.] Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
2018-09-12 12:22:54 +02:00
config BR2_RISCV_ABI_LP64
bool "lp64"
depends on BR2_ARCH_IS_64
config BR2_RISCV_ABI_LP64F
bool "lp64f"
depends on BR2_ARCH_IS_64 && BR2_RISCV_ISA_RVF
arch/Config.in.riscv: lp64f ABI is only supported if MMU is enabled Even though that seems weird, the LP64F ABI is only supported when MMU support is enabled. Indeed, as per commit 9a51381cedc16e6d70cb85e1144f6e0fa89af69a ("package/uclibc: prevent config with unsupported RISC-V float ABI"), uClibc does not support LP64F. But uClibc is the only C library that support RISC-V 64-bit noMMU. So the selection of LP64F and !MMU is impossible. Right now this selection causes a build failure as no C library is enabled. This commit fixes this by ensuring we cannot use LP64F when MMU support is not available. Fixes: http://autobuild.buildroot.net/results/6320dcc655f1871eb8bf6a9689bddde7447385f5/ Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by: Yann E. MORIN <yann.morin.1998@free.fr>
2022-07-26 18:39:48 +02:00
depends on BR2_USE_MMU
arch: add support for RISC-V 64-bit (riscv64) architecture This enables a riscv64 system to be built with a Buildroot generated toolchain (gcc >= 7.x, binutils >= 2.30, glibc only). This configuration has been used to successfully build a qemu-bootable riscv-linux-4.15 kernel (https://github.com/riscv/riscv-linux.git). Signed-off-by: Mark Corbin <mark.corbin@embecosm.com> [Thomas: - simplify arch.mk.riscv by directly setting GCC_TARGET_ARCH - simplify glibc.mk changes by using GLIBC_CONF_ENV.] Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
2018-09-12 12:22:54 +02:00
config BR2_RISCV_ABI_LP64D
bool "lp64d"
depends on BR2_ARCH_IS_64 && BR2_RISCV_ISA_RVD
endchoice
config BR2_ARCH
arch: add support for RISC-V 32-bit (riscv32) architecture This enables a riscv32 system to be built with a Buildroot generated toolchain (gcc >= 7.x, binutils >= 2.30, glibc only). This requires a custom version of glibc 2.26 from the riscv-glibc repository. Note that there are no tags in this repository, so the glibc version just consists of the 40 character commit id string. Thanks to Fabrice Bellard for pointing me towards the 32-bit glibc repository and for providing the necessary patch to get it to build. Signed-off-by: Mark Corbin <mark.corbin@embecosm.com> Reviewed-by: Matt Weber <matthew.weber@rockwellcollins.com> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
2018-10-21 21:12:01 +02:00
default "riscv32" if !BR2_ARCH_IS_64
arch: add support for RISC-V 64-bit (riscv64) architecture This enables a riscv64 system to be built with a Buildroot generated toolchain (gcc >= 7.x, binutils >= 2.30, glibc only). This configuration has been used to successfully build a qemu-bootable riscv-linux-4.15 kernel (https://github.com/riscv/riscv-linux.git). Signed-off-by: Mark Corbin <mark.corbin@embecosm.com> [Thomas: - simplify arch.mk.riscv by directly setting GCC_TARGET_ARCH - simplify glibc.mk changes by using GLIBC_CONF_ENV.] Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
2018-09-12 12:22:54 +02:00
default "riscv64" if BR2_ARCH_IS_64
core: introduce NORMALIZED_ARCH as non-kernel replacement for KERNEL_ARCH The variable 'KERNEL_ARCH' is actually a normalized version of 'ARCH'/'BR2_ARCH'. For example, 'arcle' and 'arceb' both become 'arc', just as all powerpc variants become 'powerpc'. It is presumably called 'KERNEL_ARCH' because the Linux kernel is typically the first place where support for a new architecture is added, and thus is the entity that defines the normalized name. However, the term 'KERNEL_ARCH' can also be interpreted as 'the architecture used by the kernel', which need not be exactly the same as 'the normalized name for a certain arch'. In particular, for cases where a 64-bit architecture is running a 64-bit kernel but 32-bit userspace. Examples include: * aarch64 architecture, with aarch64 kernel and 32-bit (ARM) userspace * x86_64 architecture, with x86_64 kernel and 32-bit (i386) userspace In such cases, the 'architecture used by the kernel' needs to refer to the 64-bit name (aarch64, x86_64), whereas all userspace applications need to refer the, potentially normalized, 32-bit name. This means that there need to be two different variables: KERNEL_ARCH: the architecture used by the kernel NORMALIZED_ARCH: the normalized name for the current userspace architecture At this moment, both will actually have the same content. But a subsequent patch will add basic support for situations described above, in which KERNEL_ARCH may become overwritten to the 64-bit architecture, while NORMALIZED_ARCH needs to remain the same (32-bit) case. This commit replaces use of KERNEL_ARCH where actually the userspace arch is needed. Places that use KERNEL_ARCH in combination with building of kernel modules are not touched. There may be cases where a package builds both a kernel module as userspace, in which case it may need to know about both KERNEL_ARCH and NORMALIZED_ARCH, for the case where they differ. But this is to be fixed on a per-need basis. Signed-off-by: Thomas De Schampheleire <thomas.de_schampheleire@nokia.com> Reviewed-by: Romain Naour <romain.naour@gmail.com> [Arnout: Also rename BR2_KERNEL_ARCH to BR2_NORMALIZED_ARCH] Signed-off-by: Arnout Vandecappelle (Essensium/Mind) <arnout@mind.be>
2022-01-15 21:03:00 +01:00
config BR2_NORMALIZED_ARCH
arch: move definition of KERNEL_ARCH to Config.in.<arch> files Similar to other arch-specific strings, the 'KERNEL_ARCH' variable can be determined from Config.in.<arch> files. Besides aligning with similar strings, this also means simplification: the big 'sed' covers several architectures not even supported by Buildroot. Signed-off-by: Thomas De Schampheleire <thomas.de_schampheleire@nokia.com> Reviewed-by: Romain Naour <romain.naour@gmail.com> Signed-off-by: Arnout Vandecappelle (Essensium/Mind) <arnout@mind.be>
2022-01-15 21:02:59 +01:00
default "riscv"
arch: add support for RISC-V 64-bit (riscv64) architecture This enables a riscv64 system to be built with a Buildroot generated toolchain (gcc >= 7.x, binutils >= 2.30, glibc only). This configuration has been used to successfully build a qemu-bootable riscv-linux-4.15 kernel (https://github.com/riscv/riscv-linux.git). Signed-off-by: Mark Corbin <mark.corbin@embecosm.com> [Thomas: - simplify arch.mk.riscv by directly setting GCC_TARGET_ARCH - simplify glibc.mk changes by using GLIBC_CONF_ENV.] Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
2018-09-12 12:22:54 +02:00
config BR2_ENDIAN
default "LITTLE"
config BR2_GCC_TARGET_ABI
arch: add support for RISC-V 32-bit (riscv32) architecture This enables a riscv32 system to be built with a Buildroot generated toolchain (gcc >= 7.x, binutils >= 2.30, glibc only). This requires a custom version of glibc 2.26 from the riscv-glibc repository. Note that there are no tags in this repository, so the glibc version just consists of the 40 character commit id string. Thanks to Fabrice Bellard for pointing me towards the 32-bit glibc repository and for providing the necessary patch to get it to build. Signed-off-by: Mark Corbin <mark.corbin@embecosm.com> Reviewed-by: Matt Weber <matthew.weber@rockwellcollins.com> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
2018-10-21 21:12:01 +02:00
default "ilp32" if BR2_RISCV_ABI_ILP32
default "ilp32f" if BR2_RISCV_ABI_ILP32F
default "ilp32d" if BR2_RISCV_ABI_ILP32D
arch: add support for RISC-V 64-bit (riscv64) architecture This enables a riscv64 system to be built with a Buildroot generated toolchain (gcc >= 7.x, binutils >= 2.30, glibc only). This configuration has been used to successfully build a qemu-bootable riscv-linux-4.15 kernel (https://github.com/riscv/riscv-linux.git). Signed-off-by: Mark Corbin <mark.corbin@embecosm.com> [Thomas: - simplify arch.mk.riscv by directly setting GCC_TARGET_ARCH - simplify glibc.mk changes by using GLIBC_CONF_ENV.] Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
2018-09-12 12:22:54 +02:00
default "lp64" if BR2_RISCV_ABI_LP64
default "lp64f" if BR2_RISCV_ABI_LP64F
default "lp64d" if BR2_RISCV_ABI_LP64D
config BR2_READELF_ARCH_NAME
default "RISC-V"
arch: force syntax colouring to kconfig in Config.in.* It is too sad when an editor picks up the wrong syntax... Signed-off-by: "Yann E. MORIN" <yann.morin.1998@free.fr> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
2019-05-03 15:10:17 +02:00
# vim: ft=kconfig
# -*- mode:kconfig; -*-
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