Split target/Config.in.arch into multiple Config.in.* in arch/
target/Config.in.arch had become too long, and we want to remove the
target/ directory. So let's move it to arch/ and split it this way:
* An initial Config.in that lists the top-level architecture, and
sources the arch-specific Config.in.<arch> files, as well as
Config.in.common (see below)
* One Config.in.<arch> per architecture, listing the CPU families,
ABI choices, etc.
* One Config.in.common that defines the gcc mtune, march, mcpu values
and other hidden options.
[Peter: space->tab fix, mipsel64 little endian, mips3 as noted by Arnout]
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2012-11-03 09:27:59 +01:00
|
|
|
# i386/x86_64 cpu features
|
|
|
|
config BR2_X86_CPU_HAS_MMX
|
|
|
|
bool
|
|
|
|
config BR2_X86_CPU_HAS_SSE
|
|
|
|
bool
|
|
|
|
config BR2_X86_CPU_HAS_SSE2
|
|
|
|
bool
|
|
|
|
config BR2_X86_CPU_HAS_SSE3
|
|
|
|
bool
|
|
|
|
config BR2_X86_CPU_HAS_SSSE3
|
|
|
|
bool
|
2014-01-02 18:59:45 +01:00
|
|
|
config BR2_X86_CPU_HAS_SSE4
|
|
|
|
bool
|
|
|
|
config BR2_X86_CPU_HAS_SSE42
|
|
|
|
bool
|
2015-03-18 23:01:08 +01:00
|
|
|
config BR2_X86_CPU_HAS_AVX
|
|
|
|
bool
|
2015-03-18 23:01:10 +01:00
|
|
|
config BR2_X86_CPU_HAS_AVX2
|
|
|
|
bool
|
Split target/Config.in.arch into multiple Config.in.* in arch/
target/Config.in.arch had become too long, and we want to remove the
target/ directory. So let's move it to arch/ and split it this way:
* An initial Config.in that lists the top-level architecture, and
sources the arch-specific Config.in.<arch> files, as well as
Config.in.common (see below)
* One Config.in.<arch> per architecture, listing the CPU families,
ABI choices, etc.
* One Config.in.common that defines the gcc mtune, march, mcpu values
and other hidden options.
[Peter: space->tab fix, mipsel64 little endian, mips3 as noted by Arnout]
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2012-11-03 09:27:59 +01:00
|
|
|
|
|
|
|
choice
|
|
|
|
prompt "Target Architecture Variant"
|
|
|
|
depends on BR2_i386 || BR2_x86_64
|
|
|
|
default BR2_x86_i586 if BR2_i386
|
|
|
|
help
|
|
|
|
Specific CPU variant to use
|
|
|
|
|
|
|
|
config BR2_x86_i486
|
|
|
|
bool "i486"
|
|
|
|
depends on !BR2_x86_64
|
|
|
|
config BR2_x86_i586
|
|
|
|
bool "i586"
|
|
|
|
depends on !BR2_x86_64
|
2015-10-19 13:02:52 +02:00
|
|
|
config BR2_x86_x1000
|
|
|
|
bool "x1000"
|
|
|
|
depends on !BR2_x86_64
|
|
|
|
help
|
|
|
|
The Intel X1000 is a Pentium class microprocessor in the
|
|
|
|
Quark (sub-Atom) Product Line. The X1000 has a bug on the
|
|
|
|
lock prefix requiring that prefix must be stripped at build
|
|
|
|
time.
|
|
|
|
|
2015-10-20 11:32:03 +02:00
|
|
|
See https://en.wikipedia.org/wiki/Intel_Quark
|
|
|
|
|
Split target/Config.in.arch into multiple Config.in.* in arch/
target/Config.in.arch had become too long, and we want to remove the
target/ directory. So let's move it to arch/ and split it this way:
* An initial Config.in that lists the top-level architecture, and
sources the arch-specific Config.in.<arch> files, as well as
Config.in.common (see below)
* One Config.in.<arch> per architecture, listing the CPU families,
ABI choices, etc.
* One Config.in.common that defines the gcc mtune, march, mcpu values
and other hidden options.
[Peter: space->tab fix, mipsel64 little endian, mips3 as noted by Arnout]
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2012-11-03 09:27:59 +01:00
|
|
|
config BR2_x86_i686
|
|
|
|
bool "i686"
|
|
|
|
depends on !BR2_x86_64
|
|
|
|
config BR2_x86_pentiumpro
|
|
|
|
bool "pentium pro"
|
|
|
|
depends on !BR2_x86_64
|
|
|
|
config BR2_x86_pentium_mmx
|
|
|
|
bool "pentium MMX"
|
|
|
|
select BR2_X86_CPU_HAS_MMX
|
|
|
|
depends on !BR2_x86_64
|
|
|
|
config BR2_x86_pentium_m
|
|
|
|
bool "pentium mobile"
|
|
|
|
select BR2_X86_CPU_HAS_MMX
|
|
|
|
select BR2_X86_CPU_HAS_SSE
|
|
|
|
depends on !BR2_x86_64
|
|
|
|
config BR2_x86_pentium2
|
|
|
|
bool "pentium2"
|
|
|
|
select BR2_X86_CPU_HAS_MMX
|
|
|
|
depends on !BR2_x86_64
|
|
|
|
config BR2_x86_pentium3
|
|
|
|
bool "pentium3"
|
|
|
|
select BR2_X86_CPU_HAS_MMX
|
|
|
|
select BR2_X86_CPU_HAS_SSE
|
|
|
|
depends on !BR2_x86_64
|
|
|
|
config BR2_x86_pentium4
|
|
|
|
bool "pentium4"
|
|
|
|
select BR2_X86_CPU_HAS_MMX
|
|
|
|
select BR2_X86_CPU_HAS_SSE
|
|
|
|
select BR2_X86_CPU_HAS_SSE2
|
|
|
|
depends on !BR2_x86_64
|
|
|
|
config BR2_x86_prescott
|
|
|
|
bool "prescott"
|
|
|
|
select BR2_X86_CPU_HAS_MMX
|
|
|
|
select BR2_X86_CPU_HAS_SSE
|
|
|
|
select BR2_X86_CPU_HAS_SSE2
|
|
|
|
select BR2_X86_CPU_HAS_SSE3
|
|
|
|
depends on !BR2_x86_64
|
|
|
|
config BR2_x86_nocona
|
|
|
|
bool "nocona"
|
|
|
|
select BR2_X86_CPU_HAS_MMX
|
|
|
|
select BR2_X86_CPU_HAS_SSE
|
|
|
|
select BR2_X86_CPU_HAS_SSE2
|
|
|
|
select BR2_X86_CPU_HAS_SSE3
|
|
|
|
config BR2_x86_core2
|
|
|
|
bool "core2"
|
|
|
|
select BR2_X86_CPU_HAS_MMX
|
|
|
|
select BR2_X86_CPU_HAS_SSE
|
|
|
|
select BR2_X86_CPU_HAS_SSE2
|
|
|
|
select BR2_X86_CPU_HAS_SSE3
|
|
|
|
select BR2_X86_CPU_HAS_SSSE3
|
2014-04-27 13:29:15 +02:00
|
|
|
config BR2_x86_corei7
|
|
|
|
bool "corei7"
|
|
|
|
select BR2_X86_CPU_HAS_MMX
|
|
|
|
select BR2_X86_CPU_HAS_SSE
|
|
|
|
select BR2_X86_CPU_HAS_SSE2
|
|
|
|
select BR2_X86_CPU_HAS_SSE3
|
|
|
|
select BR2_X86_CPU_HAS_SSSE3
|
|
|
|
select BR2_X86_CPU_HAS_SSE4
|
|
|
|
select BR2_X86_CPU_HAS_SSE42
|
2015-03-18 23:01:08 +01:00
|
|
|
config BR2_x86_corei7_avx
|
|
|
|
bool "corei7-avx"
|
|
|
|
select BR2_X86_CPU_HAS_MMX
|
|
|
|
select BR2_X86_CPU_HAS_SSE
|
|
|
|
select BR2_X86_CPU_HAS_SSE2
|
|
|
|
select BR2_X86_CPU_HAS_SSE3
|
|
|
|
select BR2_X86_CPU_HAS_SSSE3
|
|
|
|
select BR2_X86_CPU_HAS_SSE4
|
|
|
|
select BR2_X86_CPU_HAS_SSE42
|
|
|
|
select BR2_X86_CPU_HAS_AVX
|
2015-03-18 23:01:10 +01:00
|
|
|
config BR2_x86_core_avx2
|
|
|
|
bool "core-avx2"
|
|
|
|
select BR2_X86_CPU_HAS_MMX
|
|
|
|
select BR2_X86_CPU_HAS_SSE
|
|
|
|
select BR2_X86_CPU_HAS_SSE2
|
|
|
|
select BR2_X86_CPU_HAS_SSE3
|
|
|
|
select BR2_X86_CPU_HAS_SSSE3
|
|
|
|
select BR2_X86_CPU_HAS_SSE4
|
|
|
|
select BR2_X86_CPU_HAS_SSE42
|
|
|
|
select BR2_X86_CPU_HAS_AVX
|
|
|
|
select BR2_X86_CPU_HAS_AVX2
|
Split target/Config.in.arch into multiple Config.in.* in arch/
target/Config.in.arch had become too long, and we want to remove the
target/ directory. So let's move it to arch/ and split it this way:
* An initial Config.in that lists the top-level architecture, and
sources the arch-specific Config.in.<arch> files, as well as
Config.in.common (see below)
* One Config.in.<arch> per architecture, listing the CPU families,
ABI choices, etc.
* One Config.in.common that defines the gcc mtune, march, mcpu values
and other hidden options.
[Peter: space->tab fix, mipsel64 little endian, mips3 as noted by Arnout]
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2012-11-03 09:27:59 +01:00
|
|
|
config BR2_x86_atom
|
|
|
|
bool "atom"
|
|
|
|
select BR2_X86_CPU_HAS_MMX
|
|
|
|
select BR2_X86_CPU_HAS_SSE
|
|
|
|
select BR2_X86_CPU_HAS_SSE2
|
|
|
|
select BR2_X86_CPU_HAS_SSE3
|
|
|
|
select BR2_X86_CPU_HAS_SSSE3
|
|
|
|
config BR2_x86_k6
|
|
|
|
bool "k6"
|
|
|
|
select BR2_X86_CPU_HAS_MMX
|
|
|
|
depends on !BR2_x86_64
|
|
|
|
config BR2_x86_k6_2
|
|
|
|
bool "k6-2"
|
|
|
|
select BR2_X86_CPU_HAS_MMX
|
|
|
|
depends on !BR2_x86_64
|
|
|
|
config BR2_x86_athlon
|
|
|
|
bool "athlon"
|
|
|
|
select BR2_X86_CPU_HAS_MMX
|
|
|
|
depends on !BR2_x86_64
|
|
|
|
config BR2_x86_athlon_4
|
|
|
|
bool "athlon-4"
|
|
|
|
select BR2_X86_CPU_HAS_MMX
|
|
|
|
select BR2_X86_CPU_HAS_SSE
|
|
|
|
depends on !BR2_x86_64
|
|
|
|
config BR2_x86_opteron
|
|
|
|
bool "opteron"
|
|
|
|
select BR2_X86_CPU_HAS_MMX
|
|
|
|
select BR2_X86_CPU_HAS_SSE
|
|
|
|
select BR2_X86_CPU_HAS_SSE2
|
|
|
|
config BR2_x86_opteron_sse3
|
|
|
|
bool "opteron w/ SSE3"
|
|
|
|
select BR2_X86_CPU_HAS_MMX
|
|
|
|
select BR2_X86_CPU_HAS_SSE
|
|
|
|
select BR2_X86_CPU_HAS_SSE2
|
|
|
|
select BR2_X86_CPU_HAS_SSE3
|
|
|
|
config BR2_x86_barcelona
|
|
|
|
bool "barcelona"
|
|
|
|
select BR2_X86_CPU_HAS_MMX
|
|
|
|
select BR2_X86_CPU_HAS_SSE
|
|
|
|
select BR2_X86_CPU_HAS_SSE2
|
|
|
|
select BR2_X86_CPU_HAS_SSE3
|
2014-01-15 23:17:10 +01:00
|
|
|
config BR2_x86_jaguar
|
|
|
|
bool "jaguar"
|
|
|
|
select BR2_X86_CPU_HAS_MMX
|
|
|
|
select BR2_X86_CPU_HAS_SSE
|
|
|
|
select BR2_X86_CPU_HAS_SSE2
|
|
|
|
select BR2_X86_CPU_HAS_SSE3
|
|
|
|
select BR2_X86_CPU_HAS_SSSE3
|
2014-01-20 18:35:17 +01:00
|
|
|
select BR2_X86_CPU_HAS_SSE4
|
|
|
|
select BR2_X86_CPU_HAS_SSE42
|
2015-03-03 16:52:30 +01:00
|
|
|
config BR2_x86_steamroller
|
|
|
|
bool "steamroller"
|
|
|
|
select BR2_X86_CPU_HAS_MMX
|
|
|
|
select BR2_X86_CPU_HAS_SSE
|
|
|
|
select BR2_X86_CPU_HAS_SSE2
|
|
|
|
select BR2_X86_CPU_HAS_SSE3
|
|
|
|
select BR2_X86_CPU_HAS_SSSE3
|
|
|
|
select BR2_X86_CPU_HAS_SSE4
|
|
|
|
select BR2_X86_CPU_HAS_SSE42
|
Split target/Config.in.arch into multiple Config.in.* in arch/
target/Config.in.arch had become too long, and we want to remove the
target/ directory. So let's move it to arch/ and split it this way:
* An initial Config.in that lists the top-level architecture, and
sources the arch-specific Config.in.<arch> files, as well as
Config.in.common (see below)
* One Config.in.<arch> per architecture, listing the CPU families,
ABI choices, etc.
* One Config.in.common that defines the gcc mtune, march, mcpu values
and other hidden options.
[Peter: space->tab fix, mipsel64 little endian, mips3 as noted by Arnout]
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2012-11-03 09:27:59 +01:00
|
|
|
config BR2_x86_geode
|
|
|
|
bool "geode"
|
|
|
|
# Don't include MMX support because there several variant of geode
|
|
|
|
# processor, some with MMX support, some without.
|
|
|
|
# See: http://en.wikipedia.org/wiki/Geode_%28processor%29
|
|
|
|
depends on !BR2_x86_64
|
|
|
|
config BR2_x86_c3
|
|
|
|
bool "Via/Cyrix C3 (Samuel/Ezra cores)"
|
|
|
|
select BR2_X86_CPU_HAS_MMX
|
|
|
|
depends on !BR2_x86_64
|
|
|
|
config BR2_x86_c32
|
|
|
|
bool "Via C3-2 (Nehemiah cores)"
|
|
|
|
select BR2_X86_CPU_HAS_MMX
|
|
|
|
select BR2_X86_CPU_HAS_SSE
|
|
|
|
depends on !BR2_x86_64
|
|
|
|
config BR2_x86_winchip_c6
|
|
|
|
bool "IDT Winchip C6"
|
|
|
|
select BR2_X86_CPU_HAS_MMX
|
|
|
|
depends on !BR2_x86_64
|
|
|
|
config BR2_x86_winchip2
|
|
|
|
bool "IDT Winchip 2"
|
|
|
|
select BR2_X86_CPU_HAS_MMX
|
|
|
|
depends on !BR2_x86_64
|
|
|
|
endchoice
|
arch: improve definition of gcc mtune, mcpu, etc.
As suggested by Yann E. Morin, there is a better way than our current
big Config.in.common to define the gcc mtune, mcpu, march,
etc. values. We can split the setting of those values in each
architecture file, which makes a lot more sense.
Therefore, the Config.in file now creates empty kconfig variables
BR2_ARCH, BR2_ENDIAN, BR2_GCC_TARGET_TUNE, BR2_GCC_TARGET_ARCH,
BR2_GCC_TARGET_ABI and BR2_GCC_TARGET_CPU. The values of those
variables are set by the individual Config.in.<arch> files. This is
possible because such files are now only conditionally included
depending on the top-level architecture that has been selected.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2012-11-15 04:53:48 +01:00
|
|
|
|
|
|
|
config BR2_ARCH
|
|
|
|
default "i486" if BR2_x86_i486
|
|
|
|
default "i586" if BR2_x86_i586
|
2015-10-19 13:02:52 +02:00
|
|
|
default "i586" if BR2_x86_x1000
|
arch: improve definition of gcc mtune, mcpu, etc.
As suggested by Yann E. Morin, there is a better way than our current
big Config.in.common to define the gcc mtune, mcpu, march,
etc. values. We can split the setting of those values in each
architecture file, which makes a lot more sense.
Therefore, the Config.in file now creates empty kconfig variables
BR2_ARCH, BR2_ENDIAN, BR2_GCC_TARGET_TUNE, BR2_GCC_TARGET_ARCH,
BR2_GCC_TARGET_ABI and BR2_GCC_TARGET_CPU. The values of those
variables are set by the individual Config.in.<arch> files. This is
possible because such files are now only conditionally included
depending on the top-level architecture that has been selected.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2012-11-15 04:53:48 +01:00
|
|
|
default "i586" if BR2_x86_pentium_mmx
|
|
|
|
default "i586" if BR2_x86_geode
|
|
|
|
default "i586" if BR2_x86_c3
|
|
|
|
default "i686" if BR2_x86_c32
|
|
|
|
default "i586" if BR2_x86_winchip_c6
|
|
|
|
default "i586" if BR2_x86_winchip2
|
|
|
|
default "i686" if BR2_x86_i686
|
|
|
|
default "i686" if BR2_x86_pentium2
|
|
|
|
default "i686" if BR2_x86_pentium3
|
|
|
|
default "i686" if BR2_x86_pentium4
|
|
|
|
default "i686" if BR2_x86_pentium_m
|
|
|
|
default "i686" if BR2_x86_pentiumpro
|
|
|
|
default "i686" if BR2_x86_prescott
|
|
|
|
default "i686" if BR2_x86_nocona && BR2_i386
|
|
|
|
default "i686" if BR2_x86_core2 && BR2_i386
|
2014-04-27 13:29:15 +02:00
|
|
|
default "i686" if BR2_x86_corei7 && BR2_i386
|
2016-04-21 21:52:45 +02:00
|
|
|
default "i686" if BR2_x86_corei7_avx && BR2_i386
|
|
|
|
default "i686" if BR2_x86_corei7_avx2 && BR2_i386
|
arch: improve definition of gcc mtune, mcpu, etc.
As suggested by Yann E. Morin, there is a better way than our current
big Config.in.common to define the gcc mtune, mcpu, march,
etc. values. We can split the setting of those values in each
architecture file, which makes a lot more sense.
Therefore, the Config.in file now creates empty kconfig variables
BR2_ARCH, BR2_ENDIAN, BR2_GCC_TARGET_TUNE, BR2_GCC_TARGET_ARCH,
BR2_GCC_TARGET_ABI and BR2_GCC_TARGET_CPU. The values of those
variables are set by the individual Config.in.<arch> files. This is
possible because such files are now only conditionally included
depending on the top-level architecture that has been selected.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2012-11-15 04:53:48 +01:00
|
|
|
default "i686" if BR2_x86_atom && BR2_i386
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default "i686" if BR2_x86_opteron && BR2_i386
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default "i686" if BR2_x86_opteron_sse3 && BR2_i386
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default "i686" if BR2_x86_barcelona && BR2_i386
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2014-01-15 23:17:10 +01:00
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default "i686" if BR2_x86_jaguar && BR2_i386
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2015-03-03 16:52:30 +01:00
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default "i686" if BR2_x86_steamroller && BR2_i386
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arch: improve definition of gcc mtune, mcpu, etc.
As suggested by Yann E. Morin, there is a better way than our current
big Config.in.common to define the gcc mtune, mcpu, march,
etc. values. We can split the setting of those values in each
architecture file, which makes a lot more sense.
Therefore, the Config.in file now creates empty kconfig variables
BR2_ARCH, BR2_ENDIAN, BR2_GCC_TARGET_TUNE, BR2_GCC_TARGET_ARCH,
BR2_GCC_TARGET_ABI and BR2_GCC_TARGET_CPU. The values of those
variables are set by the individual Config.in.<arch> files. This is
possible because such files are now only conditionally included
depending on the top-level architecture that has been selected.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2012-11-15 04:53:48 +01:00
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default "i686" if BR2_x86_k6
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default "i686" if BR2_x86_k6_2
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default "i686" if BR2_x86_athlon
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default "i686" if BR2_x86_athlon_4
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default "x86_64" if BR2_x86_64
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config BR2_ENDIAN
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default "LITTLE"
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config BR2_GCC_TARGET_ARCH
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2012-11-15 04:53:53 +01:00
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default "i486" if BR2_x86_i486
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default "i586" if BR2_x86_i586
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2015-10-19 13:02:52 +02:00
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default "i586" if BR2_x86_x1000
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2012-11-15 04:53:53 +01:00
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default "pentium-mmx" if BR2_x86_pentium_mmx
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default "i686" if BR2_x86_i686
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default "pentiumpro" if BR2_x86_pentiumpro
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default "pentium-m" if BR2_x86_pentium_m
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default "pentium2" if BR2_x86_pentium2
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default "pentium3" if BR2_x86_pentium3
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default "pentium4" if BR2_x86_pentium4
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default "prescott" if BR2_x86_prescott
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default "nocona" if BR2_x86_nocona
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default "core2" if BR2_x86_core2
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2014-04-27 13:29:15 +02:00
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default "corei7" if BR2_x86_corei7
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2015-03-18 23:01:08 +01:00
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default "corei7-avx" if BR2_x86_corei7_avx
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2015-03-18 23:01:10 +01:00
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default "core-avx2" if BR2_x86_core_avx2
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2012-11-15 04:53:53 +01:00
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default "atom" if BR2_x86_atom
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default "k8" if BR2_x86_opteron
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default "k8-sse3" if BR2_x86_opteron_sse3
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default "barcelona" if BR2_x86_barcelona
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2014-01-15 23:17:10 +01:00
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default "btver2" if BR2_x86_jaguar
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2015-03-03 16:52:30 +01:00
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default "bdver3" if BR2_x86_steamroller
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2012-11-15 04:53:53 +01:00
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default "k6" if BR2_x86_k6
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default "k6-2" if BR2_x86_k6_2
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default "athlon" if BR2_x86_athlon
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default "athlon-4" if BR2_x86_athlon_4
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default "winchip-c6" if BR2_x86_winchip_c6
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default "winchip2" if BR2_x86_winchip2
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default "c3" if BR2_x86_c3
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default "c3-2" if BR2_x86_c32
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default "geode" if BR2_x86_geode
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2017-03-19 14:07:51 +01:00
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config BR2_READELF_ARCH_NAME
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default "Intel 80386" if BR2_i386
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default "Advanced Micro Devices X86-64" if BR2_x86_64
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