50 lines
917 B
Plaintext
50 lines
917 B
Plaintext
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Intro
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=====
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Andestech(nds32) AE3XX Platform
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The AE3XX prototype demonstrates the AE3XX example platform on the FPGA.
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It is composed of one Andestech(nds32) processor and AE3XX.
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How to build it
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===============
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Configure Buildroot
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-------------------
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The andes_ae3xx_defconfig configuration is a sample configuration with
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all that is required to bring the FPGA Development Board:
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$ make andes_ae3xx_defconfig
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Build everything
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----------------
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Note: you will need to have access to the network, since Buildroot will
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download the packages' sources.
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$ make
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Result of the build
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-------------------
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After building, you should obtain this tree:
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output/images/
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+-- vmlinux
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+-- rootfs.cpio
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+-- rootfs.tar
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How to run it
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=============
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Run
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---
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Setup the Console with the rate 38400/8-N-1.
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$ cd output/images
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$ ../host/bin/nds32le-linux-gdb vmlinux
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$ target remote [your host]
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$ lo
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$ c
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