40 lines
1.3 KiB
Plaintext
40 lines
1.3 KiB
Plaintext
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Linux on Spike RISC-V ISA simulator
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===================================
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This configuration provides a minimal working setup to run a Linux
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kernel in the Spike RISC-V ISA simulator.
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The Spike ISA simulator can be an interresting alternative to Qemu, in
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some specific cases. For example: simulating new instructions (see [1]),
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simulating riscv-openocd/gdb debug sessions (see [2], [3]), or
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generating an accurate per-instruction log of execution (see
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riscv-isa-sim spike -l option)...
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To run Buildroot Linux in Spike, use the commands:
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make spike_riscv64_defconfig
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make
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./board/spike/riscv64/start.sh
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The boot is made with the standard RISC-V OpenSBI boot loader. In
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order to keep the simulation simple, the rootfs is passed as an initrd
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ramfs.
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Note: at the time of this writing, Spike v1.1.0 and OpenSBI v1.0 does
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not support console input emulation for 32bit RISC-V systems. A 32bit
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Linux system can boot and reach the login, but it's not possible to
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login. See [4].
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[1].
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https://github.com/riscv-software-src/riscv-isa-sim/tree/v1.1.0#simulating-a-new-instruction
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[2].
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https://github.com/riscv-software-src/riscv-isa-sim/tree/v1.1.0#debugging-with-gdb
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[3].
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https://github.com/riscv/riscv-openocd
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[4].
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https://github.com/riscv-software-src/opensbi/blob/v1.0/lib/utils/sys/htif.c#L127
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