2021-06-07 20:54:39 +02:00
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From 014db5e5febec94e35c13ce89ee6b389328873a1 Mon Sep 17 00:00:00 2001
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2019-10-20 00:31:05 +02:00
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From: shorne <shorne@138bc75d-0d04-0410-961f-82ee72b054a4>
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Date: Sat, 31 Aug 2019 06:00:56 +0000
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Subject: [PATCH] or1k: Fix issue with set_got clobbering LR (r9)
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When compiling glibc we found that the GOT register was being allocated
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r9 when the instruction was still set_got_tmp. That is a problem
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because r9 is the Link Register (LR) in OpenRISC which is used/clobbered
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in set_got. We cannot use r9 as the GOT register. Also, we cannot
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simply say set_got_tmp clobbers r9 as this is the reason for having the
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temporary set_got_tmp.
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Fix by using a register class constraint that does not allow r9 during
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register allocation.
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gcc/ChangeLog:
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* config/or1k/constraints.md (t): New constraint.
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* config/or1k/or1k.h (GOT_REGS): New register class.
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* config/or1k/or1k.md (set_got_tmp, set_got): Use t contraint.
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git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@275242 138bc75d-0d04-0410-961f-82ee72b054a4
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(cherry picked from commit 5b9471ffca25d39635680516ba2ff85295480fc3)
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Signed-off-by: Romain Naour <romain.naour@gmail.com>
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---
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gcc/config/or1k/constraints.md | 4 ++++
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gcc/config/or1k/or1k.h | 3 +++
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gcc/config/or1k/or1k.md | 4 ++--
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3 files changed, 9 insertions(+), 2 deletions(-)
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diff --git a/gcc/config/or1k/constraints.md b/gcc/config/or1k/constraints.md
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index 93da8c058c6..a16b749008f 100644
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--- a/gcc/config/or1k/constraints.md
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+++ b/gcc/config/or1k/constraints.md
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@@ -24,6 +24,7 @@
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; We use:
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; c - sibcall registers
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+; t - got address registers (excludes LR (r9) which is clobbered by set_got)
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; I - constant signed 16-bit
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; K - constant unsigned 16-bit
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; M - constant signed 16-bit shifted left 16-bits (l.movhi)
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@@ -32,6 +33,9 @@
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(define_register_constraint "c" "SIBCALL_REGS"
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"Registers which can hold a sibling call address")
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+(define_register_constraint "t" "GOT_REGS"
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+ "Registers which can be used to store the Global Offset Table (GOT) address.")
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+
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;; Immediates
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(define_constraint "I"
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"A signed 16-bit immediate in the range -32768 to 32767."
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diff --git a/gcc/config/or1k/or1k.h b/gcc/config/or1k/or1k.h
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index 6dda230f217..feee702d89c 100644
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--- a/gcc/config/or1k/or1k.h
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+++ b/gcc/config/or1k/or1k.h
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@@ -189,6 +189,7 @@ enum reg_class
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{
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NO_REGS,
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SIBCALL_REGS,
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+ GOT_REGS,
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GENERAL_REGS,
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FLAG_REGS,
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ALL_REGS,
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@@ -200,6 +201,7 @@ enum reg_class
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#define REG_CLASS_NAMES { \
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"NO_REGS", \
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"SIBCALL_REGS", \
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+ "GOT_REGS", \
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"GENERAL_REGS", \
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"FLAG_REGS", \
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"ALL_REGS" }
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@@ -212,6 +214,7 @@ enum reg_class
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#define REG_CLASS_CONTENTS \
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{ { 0x00000000, 0x00000000 }, \
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{ SIBCALL_REGS_MASK, 0 }, \
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+ { 0xfffffdff, 0x00000000 }, \
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{ 0xffffffff, 0x00000003 }, \
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{ 0x00000000, 0x00000004 }, \
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{ 0xffffffff, 0x00000007 } \
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diff --git a/gcc/config/or1k/or1k.md b/gcc/config/or1k/or1k.md
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index 2dad51cd46b..88f3f02630f 100644
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--- a/gcc/config/or1k/or1k.md
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+++ b/gcc/config/or1k/or1k.md
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@@ -595,7 +595,7 @@
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;; set_got pattern below. This works because the set_got_tmp insn is the
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;; first insn in the stream and that it isn't moved during RA.
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(define_insn "set_got_tmp"
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- [(set (match_operand:SI 0 "register_operand" "=r")
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+ [(set (match_operand:SI 0 "register_operand" "=t")
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(unspec_volatile:SI [(const_int 0)] UNSPECV_SET_GOT))]
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""
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{
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@@ -604,7 +604,7 @@
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;; The insn to initialize the GOT.
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(define_insn "set_got"
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- [(set (match_operand:SI 0 "register_operand" "=r")
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+ [(set (match_operand:SI 0 "register_operand" "=t")
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(unspec:SI [(const_int 0)] UNSPEC_SET_GOT))
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(clobber (reg:SI LR_REGNUM))]
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""
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--
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2021-06-07 20:54:39 +02:00
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2.31.1
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2019-10-20 00:31:05 +02:00
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