604 lines
22 KiB
Diff
604 lines
22 KiB
Diff
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From 43e8c90f13806405bde8eaaf3a956d0ddc806f64 Mon Sep 17 00:00:00 2001
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From: Gregory Hermant <gregory.hermant@calao-systems.com>
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Date: Tue, 2 Oct 2012 09:19:15 +0200
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Subject: [PATCH] Add support for the USB-A9260
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Signed-off-by: Gregory Hermant <gregory.hermant@calao-systems.com>
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---
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board/usb_a9260/nandflash/Makefile | 122 ++++++++++++++
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board/usb_a9260/nandflash/usb-a9260.h | 109 ++++++++++++
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board/usb_a9260/usb_a9260.c | 298 +++++++++++++++++++++++++++++++++
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crt0_gnu.S | 7 +
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include/part.h | 6 +-
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5 files changed, 541 insertions(+), 1 deletion(-)
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create mode 100644 board/usb_a9260/nandflash/Makefile
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create mode 100644 board/usb_a9260/nandflash/usb-a9260.h
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create mode 100644 board/usb_a9260/usb_a9260.c
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diff --git a/board/usb_a9260/nandflash/Makefile b/board/usb_a9260/nandflash/Makefile
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new file mode 100644
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index 0000000..02f4b50
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--- /dev/null
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+++ b/board/usb_a9260/nandflash/Makefile
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@@ -0,0 +1,122 @@
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+# TODO: set this appropriately for your local toolchain
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+ifndef ERASE_FCT
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+ERASE_FCT=rm -f
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+endif
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+ifndef CROSS_COMPILE
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+CROSS_COMPILE=arm-elf-
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+endif
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+
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+TOOLCHAIN=gcc
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+
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+BOOTSTRAP_PATH=../../..
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+
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+# NandFlashBoot Configuration for USB-A9260
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+
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+# Target name (case sensitive!!!)
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+TARGET=AT91SAM9260
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+# Board name (case sensitive!!!)
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+BOARD=usb_a9260
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+# Link Address and Top_of_Memory
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+LINK_ADDR=0x200000
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+TOP_OF_MEMORY=0x301000
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+# Name of current directory
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+PROJECT=nandflash
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+
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+ifndef BOOT_NAME
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+BOOT_NAME=$(PROJECT)_$(BOARD)
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+endif
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+
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+INCL=./$(BOOTSTRAP_PATH)/board/$(BOARD)/$(PROJECT)
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+
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+ifeq ($(TOOLCHAIN), gcc)
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+
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+AS=$(CROSS_COMPILE)gcc
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+CC=$(CROSS_COMPILE)gcc
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+LD=$(CROSS_COMPILE)gcc
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+NM= $(CROSS_COMPILE)nm
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+SIZE=$(CROSS_COMPILE)size
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+OBJCOPY=$(CROSS_COMPILE)objcopy
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+OBJDUMP=$(CROSS_COMPILE)objdump
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+CCFLAGS=-g -mcpu=arm926ej-s -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL)
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+ASFLAGS=-g -mcpu=arm926ej-s -c -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL) -DTOP_OF_MEM=$(TOP_OF_MEMORY)
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+
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+# Linker flags.
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+# -Wl,...: tell GCC to pass this to linker.
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+# -Map: create map file
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+# --cref: add cross reference to map file
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+LDFLAGS+=-nostartfiles -nostdlib -Wl,-Map=$(BOOT_NAME).map,--cref
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+LDFLAGS+=-T $(BOOTSTRAP_PATH)/elf32-littlearm.lds -Ttext $(LINK_ADDR)
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+OBJS=crt0_gnu.o
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+
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+endif
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+
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+OBJS+=\
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+ $(BOARD).o \
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+ main.o \
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+ gpio.o \
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+ pmc.o \
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+ debug.o \
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+ sdramc.o \
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+ nandflash.o \
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+ _udivsi3.o \
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+ _umodsi3.o \
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+ div0.o \
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+ udiv.o \
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+ string.o
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+
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+
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+rebuild: clean all
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+
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+all: $(BOOT_NAME)
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+
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+ifeq ($(TOOLCHAIN), gcc)
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+$(BOOT_NAME): $(OBJS)
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+ $(LD) $(LDFLAGS) -n -o $(BOOT_NAME).elf $(OBJS)
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+ $(OBJCOPY) --strip-debug --strip-unneeded $(BOOT_NAME).elf -O binary $(BOOT_NAME).bin
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+endif
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+
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+
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+$(BOARD).o: $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c
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+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c -o $(BOARD).o
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+
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+main.o: $(BOOTSTRAP_PATH)/main.c
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+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/main.c -o main.o
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+
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+gpio.o: $(BOOTSTRAP_PATH)/driver/gpio.c
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+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/gpio.c -o gpio.o
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+
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+pmc.o: $(BOOTSTRAP_PATH)/driver/pmc.c
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+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/pmc.c -o pmc.o
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+
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+debug.o: $(BOOTSTRAP_PATH)/driver/debug.c
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+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/debug.c -o debug.o
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+
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+sdramc.o: $(BOOTSTRAP_PATH)/driver/sdramc.c
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+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/sdramc.c -o sdramc.o
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+
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+dataflash.o: $(BOOTSTRAP_PATH)/driver/dataflash.c
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+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/dataflash.c -o dataflash.o
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+
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+nandflash.o: $(BOOTSTRAP_PATH)/driver/nandflash.c
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+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/nandflash.c -o nandflash.o
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+
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+crt0_gnu.o: $(BOOTSTRAP_PATH)/crt0_gnu.S
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+ $(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/crt0_gnu.S -o crt0_gnu.o
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+
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+div0.o: $(BOOTSTRAP_PATH)/lib/div0.c
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+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/div0.c -o div0.o
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+
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+string.o: $(BOOTSTRAP_PATH)/lib/string.c
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+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/string.c -o string.o
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+
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+udiv.o: $(BOOTSTRAP_PATH)/lib/udiv.c
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+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/udiv.c -o udiv.o
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+
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+_udivsi3.o: $(BOOTSTRAP_PATH)/lib/_udivsi3.S
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+ $(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_udivsi3.S -o _udivsi3.o
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+
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+_umodsi3.o: $(BOOTSTRAP_PATH)/lib/_umodsi3.S
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+ $(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_umodsi3.S -o _umodsi3.o
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+
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+clean:
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+ $(ERASE_FCT) *.o *.bin *.elf *.map
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diff --git a/board/usb_a9260/nandflash/usb-a9260.h b/board/usb_a9260/nandflash/usb-a9260.h
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new file mode 100644
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index 0000000..2aaf759
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--- /dev/null
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+++ b/board/usb_a9260/nandflash/usb-a9260.h
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@@ -0,0 +1,109 @@
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+/* ----------------------------------------------------------------------------
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+ * ATMEL Microcontroller Software Support - ROUSSET -
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+ * ----------------------------------------------------------------------------
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+ * Copyright (c) 2006, Atmel Corporation
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+
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+ * All rights reserved.
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+ *
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+ * Redistribution and use in source and binary forms, with or without
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+ * modification, are permitted provided that the following conditions are met:
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+ *
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+ * - Redistributions of source code must retain the above copyright notice,
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+ * this list of conditions and the disclaimer below.
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+ *
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+ * Atmel's name may not be used to endorse or promote products derived from
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+ * this software without specific prior written permission.
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+ *
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+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
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+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
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+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
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+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
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+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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+ * ----------------------------------------------------------------------------
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+ * File Name : usb-a9260.h
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+ * Object :
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+ * Creation : GH Oct 1th 2012
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+ *-----------------------------------------------------------------------------
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+ */
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+#ifndef _USB_A9260_H
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+#define _USB_A9260_H
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+
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+/* ******************************************************************* */
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+/* PMC Settings */
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+/* */
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+/* The main oscillator is enabled as soon as possible in the c_startup */
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+/* and MCK is switched on the main oscillator. */
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+/* PLL initialization is done later in the hw_init() function */
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+/* ******************************************************************* */
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+#define MASTER_CLOCK (180000000/2)
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+#define PLL_LOCK_TIMEOUT 1000000
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+
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+#define PLLA_SETTINGS 0x20593F06
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+#define PLLB_SETTINGS 0x10483F0E
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+
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+/* Switch MCK on PLLA output PCK = PLLA = 2 * MCK */
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+#define MCKR_SETTINGS (AT91C_PMC_PRES_CLK | AT91C_PMC_MDIV_2)
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+#define MCKR_CSS_SETTINGS (AT91C_PMC_CSS_PLLA_CLK | MCKR_SETTINGS)
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+
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+/* ******************************************************************* */
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+/* NandFlash Settings */
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+/* */
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+/* ******************************************************************* */
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+#define AT91C_SMARTMEDIA_BASE 0x40000000
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+
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+#define AT91_SMART_MEDIA_ALE (1 << 21) /* our ALE is AD21 */
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+#define AT91_SMART_MEDIA_CLE (1 << 22) /* our CLE is AD22 */
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+
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+#define NAND_DISABLE_CE() do { *(volatile unsigned int *)AT91C_PIOC_SODR = AT91C_PIO_PC14;} while(0)
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+#define NAND_ENABLE_CE() do { *(volatile unsigned int *)AT91C_PIOC_CODR = AT91C_PIO_PC14;} while(0)
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+
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+#define NAND_WAIT_READY() while (!(*(volatile unsigned int *)AT91C_PIOC_PDSR & AT91C_PIO_PC13))
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+
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+
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+/* ******************************************************************** */
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+/* SMC Chip Select 3 Timings for NandFlash for MASTER_CLOCK = 90000000.*/
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+/* Please refer to SMC section in AT91SAM datasheet to learn how */
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+/* to generate these values. */
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+/* ******************************************************************** */
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+#define AT91C_SM_NWE_SETUP (1 << 0)
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+#define AT91C_SM_NCS_WR_SETUP (0 << 8)
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+#define AT91C_SM_NRD_SETUP (1 << 16)
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+#define AT91C_SM_NCS_RD_SETUP (0 << 24)
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+
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+#define AT91C_SM_NWE_PULSE (3 << 0)
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+#define AT91C_SM_NCS_WR_PULSE (3 << 8)
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+#define AT91C_SM_NRD_PULSE (3 << 16)
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+#define AT91C_SM_NCS_RD_PULSE (3 << 24)
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+
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+#define AT91C_SM_NWE_CYCLE (5 << 0)
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+#define AT91C_SM_NRD_CYCLE (5 << 16)
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+#define AT91C_SM_TDF (2 << 16)
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+
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+/* ******************************************************************* */
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+/* BootStrap Settings */
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+/* */
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+/* ******************************************************************* */
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+#define IMG_ADDRESS 0x20000 /* Image Address in NandFlash */
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+#define IMG_SIZE 0x40000 /* Image Size in NandFlash */
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+
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+#define MACH_TYPE 0x6AD /* USB-A9260 */
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+#define JUMP_ADDR 0x23F00000 /* Final Jump Address */
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+
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+/* ******************************************************************* */
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+/* Application Settings */
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+/* ******************************************************************* */
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+#undef CFG_DEBUG
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+#undef CFG_DATAFLASH
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+
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+#define CFG_NANDFLASH
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+#undef NANDFLASH_SMALL_BLOCKS /* NANDFLASH_LARGE_BLOCKS used instead */
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+
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+#define CFG_HW_INIT
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+#define CFG_SDRAM
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+
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+#endif /* _USB_A9260_H */
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diff --git a/board/usb_a9260/usb_a9260.c b/board/usb_a9260/usb_a9260.c
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new file mode 100644
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index 0000000..de30f0b
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--- /dev/null
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+++ b/board/usb_a9260/usb_a9260.c
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@@ -0,0 +1,298 @@
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+/* ----------------------------------------------------------------------------
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+ * ATMEL Microcontroller Software Support - ROUSSET -
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+ * ----------------------------------------------------------------------------
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+ * Copyright (c) 2006, Atmel Corporation
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+
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+ * All rights reserved.
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+ *
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+ * Redistribution and use in source and binary forms, with or without
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+ * modification, are permitted provided that the following conditions are met:
|
||
|
|
+ *
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||
|
|
+ * - Redistributions of source code must retain the above copyright notice,
|
||
|
|
+ * this list of conditions and the disclaiimer below.
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||
|
|
+ *
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||
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+ * Atmel's name may not be used to endorse or promote products derived from
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||
|
|
+ * this software without specific prior written permission.
|
||
|
|
+ *
|
||
|
|
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
|
||
|
|
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||
|
|
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||
|
|
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||
|
|
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||
|
|
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
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||
|
|
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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||
|
|
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
|
||
|
|
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||
|
|
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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||
|
|
+ * ----------------------------------------------------------------------------
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||
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+ * File Name : usb_a9260.c
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+ * Object :
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+ * Creation : GH Oct 1th 2012
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+ *-----------------------------------------------------------------------------
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+ */
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+#include "../../include/part.h"
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+#include "../../include/gpio.h"
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+#include "../../include/pmc.h"
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+#include "../../include/debug.h"
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+#include "../../include/sdramc.h"
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+#include "../../include/main.h"
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+#ifdef CFG_NANDFLASH
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+#include "../../include/nandflash.h"
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+#endif
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+#ifdef CFG_DATAFLASH
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+#include "../../include/dataflash.h"
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+#endif
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+
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+static inline unsigned int get_cp15(void)
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+{
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+ unsigned int value;
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|
|
+ __asm__("mrc p15, 0, %0, c1, c0, 0" : "=r" (value));
|
||
|
|
+ return value;
|
||
|
|
+}
|
||
|
|
+
|
||
|
|
+static inline void set_cp15(unsigned int value)
|
||
|
|
+{
|
||
|
|
+ __asm__("mcr p15, 0, %0, c1, c0, 0" : : "r" (value));
|
||
|
|
+}
|
||
|
|
+
|
||
|
|
+#ifdef CFG_HW_INIT
|
||
|
|
+/*----------------------------------------------------------------------------*/
|
||
|
|
+/* \fn hw_init */
|
||
|
|
+/* \brief This function performs very low level HW initialization */
|
||
|
|
+/* This function is invoked as soon as possible during the c_startup */
|
||
|
|
+/* The bss segment must be initialized */
|
||
|
|
+/*----------------------------------------------------------------------------*/
|
||
|
|
+void hw_init(void)
|
||
|
|
+{
|
||
|
|
+ unsigned int cp15;
|
||
|
|
+
|
||
|
|
+ /* Configure PIOs */
|
||
|
|
+ const struct pio_desc hw_pio[] = {
|
||
|
|
+#ifdef CFG_DEBUG
|
||
|
|
+ {"RXD", AT91C_PIN_PB(14), 0, PIO_DEFAULT, PIO_PERIPH_A},
|
||
|
|
+ {"TXD", AT91C_PIN_PB(15), 0, PIO_DEFAULT, PIO_PERIPH_A},
|
||
|
|
+#endif
|
||
|
|
+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ /* Disable watchdog */
|
||
|
|
+ writel(AT91C_WDTC_WDDIS, AT91C_BASE_WDTC + WDTC_WDMR);
|
||
|
|
+
|
||
|
|
+ /* At this stage the main oscillator is supposed to be enabled
|
||
|
|
+ * PCK = MCK = MOSC */
|
||
|
|
+
|
||
|
|
+ /* Configure PLLA = MOSC * (PLL_MULA + 1) / PLL_DIVA */
|
||
|
|
+ pmc_cfg_plla(PLLA_SETTINGS, PLL_LOCK_TIMEOUT);
|
||
|
|
+
|
||
|
|
+ /* PCK = PLLA = 2 * MCK */
|
||
|
|
+ pmc_cfg_mck(MCKR_SETTINGS, PLL_LOCK_TIMEOUT);
|
||
|
|
+ /* Switch MCK on PLLA output */
|
||
|
|
+ pmc_cfg_mck(MCKR_CSS_SETTINGS, PLL_LOCK_TIMEOUT);
|
||
|
|
+
|
||
|
|
+ /* Configure PLLB */
|
||
|
|
+ pmc_cfg_pllb(PLLB_SETTINGS, PLL_LOCK_TIMEOUT);
|
||
|
|
+
|
||
|
|
+ /* Configure CP15 */
|
||
|
|
+ cp15 = get_cp15();
|
||
|
|
+ cp15 |= I_CACHE;
|
||
|
|
+ set_cp15(cp15);
|
||
|
|
+
|
||
|
|
+ /* Configure the PIO controller */
|
||
|
|
+ pio_setup(hw_pio);
|
||
|
|
+
|
||
|
|
+ /* Configure the EBI Slave Slot Cycle to 64 */
|
||
|
|
+ writel( (readl((AT91C_BASE_MATRIX + MATRIX_SCFG3)) & ~0xFF) | 0x40, (AT91C_BASE_MATRIX + MATRIX_SCFG3));
|
||
|
|
+
|
||
|
|
+#ifdef CFG_DEBUG
|
||
|
|
+ /* Enable Debug messages on the DBGU */
|
||
|
|
+ dbg_init(BAUDRATE(MASTER_CLOCK, 115200));
|
||
|
|
+
|
||
|
|
+ dbg_print("Start AT91Bootstrap...\n\r");
|
||
|
|
+#endif /* CFG_DEBUG */
|
||
|
|
+
|
||
|
|
+#ifdef CFG_SDRAM
|
||
|
|
+ /* Initialize the matrix */
|
||
|
|
+ writel(readl(AT91C_BASE_CCFG + CCFG_EBICSA) | AT91C_EBI_CS1A_SDRAMC, AT91C_BASE_CCFG + CCFG_EBICSA);
|
||
|
|
+
|
||
|
|
+ /* Configure SDRAM Controller */
|
||
|
|
+ sdram_init( AT91C_SDRAMC_NC_9 |
|
||
|
|
+ AT91C_SDRAMC_NR_13 |
|
||
|
|
+ AT91C_SDRAMC_CAS_2 |
|
||
|
|
+ AT91C_SDRAMC_NB_4_BANKS |
|
||
|
|
+ AT91C_SDRAMC_DBW_32_BITS |
|
||
|
|
+ AT91C_SDRAMC_TWR_2 |
|
||
|
|
+ AT91C_SDRAMC_TRC_7 |
|
||
|
|
+ AT91C_SDRAMC_TRP_2 |
|
||
|
|
+ AT91C_SDRAMC_TRCD_2 |
|
||
|
|
+ AT91C_SDRAMC_TRAS_5 |
|
||
|
|
+ AT91C_SDRAMC_TXSR_8, /* Control Register */
|
||
|
|
+ (MASTER_CLOCK * 7)/1000000, /* Refresh Timer Register */
|
||
|
|
+ AT91C_SDRAMC_MD_SDRAM); /* SDRAM (no low power) */
|
||
|
|
+
|
||
|
|
+
|
||
|
|
+#endif /* CFG_SDRAM */
|
||
|
|
+}
|
||
|
|
+#endif /* CFG_HW_INIT */
|
||
|
|
+
|
||
|
|
+#ifdef CFG_SDRAM
|
||
|
|
+/*------------------------------------------------------------------------------*/
|
||
|
|
+/* \fn sdramc_hw_init */
|
||
|
|
+/* \brief This function performs SDRAMC HW initialization */
|
||
|
|
+/*------------------------------------------------------------------------------*/
|
||
|
|
+void sdramc_hw_init(void)
|
||
|
|
+{
|
||
|
|
+ /* Configure PIOs */
|
||
|
|
+/* const struct pio_desc sdramc_pio[] = {
|
||
|
|
+ {"D16", AT91C_PIN_PC(16), 0, PIO_DEFAULT, PIO_PERIPH_A},
|
||
|
|
+ {"D17", AT91C_PIN_PC(17), 0, PIO_DEFAULT, PIO_PERIPH_A},
|
||
|
|
+ {"D18", AT91C_PIN_PC(18), 0, PIO_DEFAULT, PIO_PERIPH_A},
|
||
|
|
+ {"D19", AT91C_PIN_PC(19), 0, PIO_DEFAULT, PIO_PERIPH_A},
|
||
|
|
+ {"D20", AT91C_PIN_PC(20), 0, PIO_DEFAULT, PIO_PERIPH_A},
|
||
|
|
+ {"D21", AT91C_PIN_PC(21), 0, PIO_DEFAULT, PIO_PERIPH_A},
|
||
|
|
+ {"D22", AT91C_PIN_PC(22), 0, PIO_DEFAULT, PIO_PERIPH_A},
|
||
|
|
+ {"D23", AT91C_PIN_PC(23), 0, PIO_DEFAULT, PIO_PERIPH_A},
|
||
|
|
+ {"D24", AT91C_PIN_PC(24), 0, PIO_DEFAULT, PIO_PERIPH_A},
|
||
|
|
+ {"D25", AT91C_PIN_PC(25), 0, PIO_DEFAULT, PIO_PERIPH_A},
|
||
|
|
+ {"D26", AT91C_PIN_PC(26), 0, PIO_DEFAULT, PIO_PERIPH_A},
|
||
|
|
+ {"D27", AT91C_PIN_PC(27), 0, PIO_DEFAULT, PIO_PERIPH_A},
|
||
|
|
+ {"D28", AT91C_PIN_PC(28), 0, PIO_DEFAULT, PIO_PERIPH_A},
|
||
|
|
+ {"D29", AT91C_PIN_PC(29), 0, PIO_DEFAULT, PIO_PERIPH_A},
|
||
|
|
+ {"D30", AT91C_PIN_PC(30), 0, PIO_DEFAULT, PIO_PERIPH_A},
|
||
|
|
+ {"D31", AT91C_PIN_PC(31), 0, PIO_DEFAULT, PIO_PERIPH_A},
|
||
|
|
+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
|
||
|
|
+ };
|
||
|
|
+*/
|
||
|
|
+ /* Configure the SDRAMC PIO controller to output PCK0 */
|
||
|
|
+/* pio_setup(sdramc_pio); */
|
||
|
|
+
|
||
|
|
+ writel(0xFFFF0000, AT91C_BASE_PIOC + PIO_ASR(0));
|
||
|
|
+ writel(0xFFFF0000, AT91C_BASE_PIOC + PIO_PDR(0));
|
||
|
|
+
|
||
|
|
+}
|
||
|
|
+#endif /* CFG_SDRAM */
|
||
|
|
+
|
||
|
|
+#ifdef CFG_DATAFLASH
|
||
|
|
+
|
||
|
|
+/*------------------------------------------------------------------------------*/
|
||
|
|
+/* \fn df_recovery */
|
||
|
|
+/* \brief This function erases DataFlash Page 0 if USR PB is pressed */
|
||
|
|
+/* during boot sequence */
|
||
|
|
+/*------------------------------------------------------------------------------*/
|
||
|
|
+void df_recovery(AT91PS_DF pDf)
|
||
|
|
+{
|
||
|
|
+#if (AT91C_SPI_PCS_DATAFLASH == AT91C_SPI_PCS0_DATAFLASH)
|
||
|
|
+ /* Configure PIOs */
|
||
|
|
+ const struct pio_desc usrpb_pio[] = {
|
||
|
|
+ {"USRPB", AT91C_PIN_PB(10), 0, PIO_PULLUP, PIO_INPUT},
|
||
|
|
+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ /* Configure the PIO controller */
|
||
|
|
+ writel((1 << AT91C_ID_PIOB), PMC_PCER + AT91C_BASE_PMC);
|
||
|
|
+ pio_setup(usrpb_pio);
|
||
|
|
+
|
||
|
|
+ /* If USR PB is pressed during Boot sequence */
|
||
|
|
+ /* Erase DataFlash Page 0*/
|
||
|
|
+ if ( !pio_get_value(AT91C_PIN_PB(10)) )
|
||
|
|
+ df_page_erase(pDf, 0);
|
||
|
|
+#endif
|
||
|
|
+}
|
||
|
|
+
|
||
|
|
+/*------------------------------------------------------------------------------*/
|
||
|
|
+/* \fn df_hw_init */
|
||
|
|
+/* \brief This function performs DataFlash HW initialization */
|
||
|
|
+/*------------------------------------------------------------------------------*/
|
||
|
|
+void df_hw_init(void)
|
||
|
|
+{
|
||
|
|
+ /* Configure PIOs */
|
||
|
|
+ const struct pio_desc df_pio[] = {
|
||
|
|
+ {"MISO", AT91C_PIN_PA(0), 0, PIO_DEFAULT, PIO_PERIPH_A},
|
||
|
|
+ {"MOSI", AT91C_PIN_PA(1), 0, PIO_DEFAULT, PIO_PERIPH_A},
|
||
|
|
+ {"SPCK", AT91C_PIN_PA(2), 0, PIO_DEFAULT, PIO_PERIPH_A},
|
||
|
|
+#if (AT91C_SPI_PCS_DATAFLASH == AT91C_SPI_PCS0_DATAFLASH)
|
||
|
|
+ {"NPCS0", AT91C_PIN_PA(3), 0, PIO_DEFAULT, PIO_PERIPH_A},
|
||
|
|
+#endif
|
||
|
|
+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ /* Configure the PIO controller */
|
||
|
|
+ pio_setup(df_pio);
|
||
|
|
+}
|
||
|
|
+#endif /* CFG_DATAFLASH */
|
||
|
|
+
|
||
|
|
+
|
||
|
|
+
|
||
|
|
+#ifdef CFG_NANDFLASH
|
||
|
|
+/*------------------------------------------------------------------------------*/
|
||
|
|
+/* \fn nand_recovery */
|
||
|
|
+/* \brief This function erases NandFlash Block 0 if USR PB is pressed */
|
||
|
|
+/* during boot sequence */
|
||
|
|
+/*------------------------------------------------------------------------------*/
|
||
|
|
+static void nand_recovery(void)
|
||
|
|
+{
|
||
|
|
+ /* Configure PIOs */
|
||
|
|
+ const struct pio_desc usrpb_pio[] = {
|
||
|
|
+ {"USRPB", AT91C_PIN_PB(10), 0, PIO_PULLUP, PIO_INPUT},
|
||
|
|
+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ /* Configure the PIO controller */
|
||
|
|
+ writel((1 << AT91C_ID_PIOB), PMC_PCER + AT91C_BASE_PMC);
|
||
|
|
+ pio_setup(usrpb_pio);
|
||
|
|
+
|
||
|
|
+ /* If USR PB is pressed during Boot sequence */
|
||
|
|
+ /* Erase NandFlash block 0*/
|
||
|
|
+ if (!pio_get_value(AT91C_PIN_PB(10)) )
|
||
|
|
+ AT91F_NandEraseBlock0();
|
||
|
|
+}
|
||
|
|
+
|
||
|
|
+/*------------------------------------------------------------------------------*/
|
||
|
|
+/* \fn nandflash_hw_init */
|
||
|
|
+/* \brief NandFlash HW init */
|
||
|
|
+/*------------------------------------------------------------------------------*/
|
||
|
|
+void nandflash_hw_init(void)
|
||
|
|
+{
|
||
|
|
+ /* Configure PIOs */
|
||
|
|
+ const struct pio_desc nand_pio[] = {
|
||
|
|
+ {"RDY_BSY", AT91C_PIN_PC(13), 0, PIO_PULLUP, PIO_INPUT},
|
||
|
|
+ {"NANDCS", AT91C_PIN_PC(14), 0, PIO_PULLUP, PIO_OUTPUT},
|
||
|
|
+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ /* Setup Smart Media, first enable the address range of CS3 in HMATRIX user interface */
|
||
|
|
+ writel(readl(AT91C_BASE_CCFG + CCFG_EBICSA) | AT91C_EBI_CS3A_SM, AT91C_BASE_CCFG + CCFG_EBICSA);
|
||
|
|
+
|
||
|
|
+ /* Configure SMC CS3 */
|
||
|
|
+ writel((AT91C_SM_NWE_SETUP | AT91C_SM_NCS_WR_SETUP | AT91C_SM_NRD_SETUP | AT91C_SM_NCS_RD_SETUP), AT91C_BASE_SMC + SMC_SETUP3);
|
||
|
|
+ writel((AT91C_SM_NWE_PULSE | AT91C_SM_NCS_WR_PULSE | AT91C_SM_NRD_PULSE | AT91C_SM_NCS_RD_PULSE), AT91C_BASE_SMC + SMC_PULSE3);
|
||
|
|
+ writel((AT91C_SM_NWE_CYCLE | AT91C_SM_NRD_CYCLE) , AT91C_BASE_SMC + SMC_CYCLE3);
|
||
|
|
+ writel((AT91C_SMC_READMODE | AT91C_SMC_WRITEMODE | AT91C_SMC_NWAITM_NWAIT_DISABLE |
|
||
|
|
+ AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS | AT91C_SM_TDF) , AT91C_BASE_SMC + SMC_CTRL3);
|
||
|
|
+
|
||
|
|
+ /* Configure the PIO controller */
|
||
|
|
+ writel((1 << AT91C_ID_PIOC), PMC_PCER + AT91C_BASE_PMC);
|
||
|
|
+ pio_setup(nand_pio);
|
||
|
|
+
|
||
|
|
+ nand_recovery();
|
||
|
|
+}
|
||
|
|
+
|
||
|
|
+/*------------------------------------------------------------------------------*/
|
||
|
|
+/* \fn nandflash_cfg_16bits_dbw_init */
|
||
|
|
+/* \brief Configure SMC in 16 bits mode */
|
||
|
|
+/*------------------------------------------------------------------------------*/
|
||
|
|
+void nandflash_cfg_16bits_dbw_init(void)
|
||
|
|
+{
|
||
|
|
+ writel(readl(AT91C_BASE_SMC + SMC_CTRL3) | AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS, AT91C_BASE_SMC + SMC_CTRL3);
|
||
|
|
+}
|
||
|
|
+
|
||
|
|
+/*------------------------------------------------------------------------------*/
|
||
|
|
+/* \fn nandflash_cfg_8bits_dbw_init */
|
||
|
|
+/* \brief Configure SMC in 8 bits mode */
|
||
|
|
+/*------------------------------------------------------------------------------*/
|
||
|
|
+void nandflash_cfg_8bits_dbw_init(void)
|
||
|
|
+{
|
||
|
|
+ writel((readl(AT91C_BASE_SMC + SMC_CTRL3) & ~(AT91C_SMC_DBW)) | AT91C_SMC_DBW_WIDTH_EIGTH_BITS, AT91C_BASE_SMC + SMC_CTRL3);
|
||
|
|
+}
|
||
|
|
+
|
||
|
|
+
|
||
|
|
+#endif /* #ifdef CFG_NANDFLASH */
|
||
|
|
diff --git a/crt0_gnu.S b/crt0_gnu.S
|
||
|
|
index 042b617..002feef 100644
|
||
|
|
--- a/crt0_gnu.S
|
||
|
|
+++ b/crt0_gnu.S
|
||
|
|
@@ -106,6 +106,13 @@ _relocate_to_sram:
|
||
|
|
#endif /* CFG_NORFLASH */
|
||
|
|
|
||
|
|
_setup_clocks:
|
||
|
|
+/* Test if main osc is bypassed */
|
||
|
|
+ ldr r0,=AT91C_PMC_MOR
|
||
|
|
+ ldr r1, [r0]
|
||
|
|
+ ldr r2,=AT91C_CKGR_OSCBYPASS
|
||
|
|
+ ands r1, r1, r2
|
||
|
|
+ bne _init_data /* branch if OSCBYPASS=1 */
|
||
|
|
+
|
||
|
|
/* Test if main oscillator is enabled */
|
||
|
|
ldr r0,=AT91C_PMC_SR
|
||
|
|
ldr r1, [r0]
|
||
|
|
diff --git a/include/part.h b/include/part.h
|
||
|
|
index ba5985a..212789f 100644
|
||
|
|
--- a/include/part.h
|
||
|
|
+++ b/include/part.h
|
||
|
|
@@ -35,7 +35,11 @@
|
||
|
|
|
||
|
|
#ifdef AT91SAM9260
|
||
|
|
#include "AT91SAM9260_inc.h"
|
||
|
|
-#include "at91sam9260ek.h"
|
||
|
|
+ #ifdef at91sam9260ek
|
||
|
|
+ #include "at91sam9260ek.h"
|
||
|
|
+ #elif usb_a9260
|
||
|
|
+ #include "usb-a9260.h"
|
||
|
|
+ #endif
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#ifdef AT91SAM9XE
|
||
|
|
--
|
||
|
|
1.7.9.5
|
||
|
|
|