90 lines
2.2 KiB
Diff
90 lines
2.2 KiB
Diff
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From: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
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Subject: [PATCH 4/4] arm: dts: owl-s500: Add RoseapplePi
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To: Rob Herring <robh+dt@kernel.org>,
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Andreas Färber <afaerber@suse.de>,
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Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
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Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
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linux-arm-kernel@lists.infradead.org
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Date: Mon, 15 Jun 2020 03:19:11 +0300 (10 weeks, 3 days, 20 hours ago)
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X-Mailer: git-send-email 2.27.0
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Add a Device Tree for the RoseapplePi SBC.
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Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
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Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
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---
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arch/arm/boot/dts/Makefile | 1 +
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arch/arm/boot/dts/owl-s500-roseapplepi.dts | 47 ++++++++++++++++++++++
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2 files changed, 48 insertions(+)
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create mode 100644 arch/arm/boot/dts/owl-s500-roseapplepi.dts
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diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
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index e8dd99201397..d0712e7275da 100644
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--- a/arch/arm/boot/dts/Makefile
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+++ b/arch/arm/boot/dts/Makefile
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@@ -856,6 +856,7 @@ dtb-$(CONFIG_ARCH_ORION5X) += \
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dtb-$(CONFIG_ARCH_ACTIONS) += \
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owl-s500-cubieboard6.dtb \
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owl-s500-guitar-bb-rev-b.dtb \
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+ owl-s500-roseapplepi.dtb \
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owl-s500-sparky.dtb
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dtb-$(CONFIG_ARCH_PRIMA2) += \
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prima2-evb.dtb
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diff --git a/arch/arm/boot/dts/owl-s500-roseapplepi.dts b/arch/arm/boot/dts/owl-s500-roseapplepi.dts
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new file mode 100644
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index 000000000000..c61fbaa3821e
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--- /dev/null
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+++ b/arch/arm/boot/dts/owl-s500-roseapplepi.dts
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@@ -0,0 +1,47 @@
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+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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+/*
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+ * Roseapple Pi
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+ *
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+ * Copyright (c) 2020 Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
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+ */
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+
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+/dts-v1/;
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+
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+#include "owl-s500.dtsi"
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+
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+/ {
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+ compatible = "roseapplepi,roseapplepi", "actions,s500";
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+ model = "Roseapple Pi";
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+
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+ aliases {
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+ serial2 = &uart2;
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+ };
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+
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+ chosen {
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+ stdout-path = "serial2:115200n8";
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+ };
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+
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+ memory@0 {
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+ device_type = "memory";
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+ reg = <0x0 0x80000000>; /* 2GB */
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+ };
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+
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+ uart2_clk: uart2-clk {
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+ compatible = "fixed-clock";
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+ clock-frequency = <921600>;
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+ #clock-cells = <0>;
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+ };
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+};
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+
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+&twd_timer {
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+ status = "okay";
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+};
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+
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+&timer {
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+ clocks = <&hosc>;
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+};
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+
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+&uart2 {
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+ status = "okay";
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+ clocks = <&uart2_clk>;
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+};
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--
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2.27.0
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