2016-11-07 02:20:02 +01:00
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comment "Linaro toolchains available for Cortex-A + EABIhf"
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depends on BR2_arm
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depends on !BR2_ARM_CPU_ARMV7A || !BR2_ARM_EABIHF
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depends on !BR2_STATIC_LIBS
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config BR2_TOOLCHAIN_EXTERNAL_LINARO_ARM
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2017-02-19 14:51:24 +01:00
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bool "Linaro ARM 2017.02"
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2016-11-07 02:20:02 +01:00
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depends on BR2_arm
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toolchain-external-linaro-{arm,armeb}: allow on ARMv8
The Linaro toolchains are currently only available on ARMv7-A, but can
in fact also be used to generate 32 bits code for ARMv8 platforms. This
commit therefore adjusts their architecture dependency.
Example, a 32 bits ARM build produces a 32 bits busybox binary:
$ file output/target/bin/busybox
output/target/bin/busybox: setuid ELF 32-bit LSB executable, ARM, EABI5 version 1 (SYSV), dynamically linked, interpreter /lib/ld-linux-armhf.so.3, for GNU/Linux 2.6.32, BuildID[sha1]=16a7a70eb9cac08759e52a260478b9c287f59238, stripped
Which was built for Cortex-A72:
$ ./output/host/usr/bin/arm-linux-gnueabihf-readelf -A output/target/bin/busybox
Attribute Section: aeabi
File Attributes
Tag_CPU_name: "Cortex-A72"
Tag_CPU_arch: v8
Tag_CPU_arch_profile: Application
Tag_ARM_ISA_use: Yes
Tag_THUMB_ISA_use: Thumb-2
Tag_FP_arch: FP for ARMv8
Tag_ABI_PCS_wchar_t: 4
Tag_ABI_FP_rounding: Needed
Tag_ABI_FP_denormal: Needed
Tag_ABI_FP_exceptions: Needed
Tag_ABI_FP_number_model: IEEE 754
Tag_ABI_align_needed: 8-byte
Tag_ABI_align_preserved: 8-byte, except leaf SP
Tag_ABI_enum_size: int
Tag_ABI_VFP_args: VFP registers
Tag_CPU_unaligned_access: v6
Tag_MPextension_use: Allowed
Tag_Virtualization_use: TrustZone and Virtualization Extensions
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2016-12-05 23:15:43 +01:00
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depends on BR2_ARM_CPU_ARMV7A || BR2_ARM_CPU_ARMV8
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2016-11-07 02:20:02 +01:00
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depends on BR2_HOSTARCH = "x86_64" || BR2_HOSTARCH = "x86"
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depends on BR2_ARM_EABIHF
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depends on !BR2_STATIC_LIBS
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select BR2_TOOLCHAIN_EXTERNAL_GLIBC
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select BR2_TOOLCHAIN_HAS_SSP
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select BR2_TOOLCHAIN_HAS_NATIVE_RPC
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select BR2_INSTALL_LIBSTDCPP
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2016-11-29 22:42:59 +01:00
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select BR2_TOOLCHAIN_HEADERS_AT_LEAST_4_6
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select BR2_TOOLCHAIN_GCC_AT_LEAST_6
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2016-11-07 02:20:02 +01:00
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select BR2_TOOLCHAIN_HAS_FORTRAN
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help
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Linaro toolchain for the ARM architecture. It uses Linaro
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2017-02-19 14:51:24 +01:00
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GCC 2017.02 (based on gcc 6.3.1), Linaro GDB 2017.02 (based on
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GDB 7.12), glibc 2.23, Binutils 2017.02 (based on 2.27). It
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2016-11-07 02:20:02 +01:00
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generates code that runs on all Cortex-A profile devices,
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but tuned for the Cortex-A9. The code generated is Thumb 2,
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with the hard floating point calling convention, and uses
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the VFPv3-D16 FPU instructions.
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